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README.md
@@ -39,6 +39,7 @@ Addresses `0xf0000010` and `0xf0000030` contain emulated UART 16550 peripherals
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- Configurable FIFO capacity (up to 254 bytes) for TX and RX, stored as a variable in the CONFIG processor.
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- Theoretical maximum transfer rate of 121920 bits/sec (254 bytes/tick).
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- Line Status Register flags: Transmitter Empty, THR Empty, Overrun Error, Data Ready.
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+- FIFO Control Register flags: Enable FIFOs (0 is ignored), Reset RX/TX FIFO
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The UART registers have a stride of 4 bytes to simplify some internal logic.
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