|
4 | 4 | set CSRS processor18 |
5 | 5 | set DISPLAY display1 |
6 | 6 | set CPU processor1 |
| 7 | + set DECODER processor19 |
7 | 8 |
|
8 | 9 | set LOOKUP_PROC_SIZE 260 |
9 | 10 |
|
@@ -102,10 +103,17 @@ loop: |
102 | 103 | op shl instreth instreth 32 |
103 | 104 | op add instret instret instreth |
104 | 105 |
|
105 | | - read pc CPU "pc" |
| 106 | + read ipt CPU "IPT" |
106 | 107 | read state CPU "STATE" |
| 108 | + read pc CPU "pc" |
| 109 | + read op_id CPU "op_id" |
| 110 | + read arg1 CPU "arg1" |
| 111 | + read arg2 CPU "arg2" |
| 112 | + read arg3 CPU "arg3" |
107 | 113 | read exit_code CPU "exit_code" |
108 | | - read ipt CPU "IPT" |
| 114 | + |
| 115 | + read decode_time DECODER "DECODE_DURATION" |
| 116 | + op floor decode_time decode_time |
109 | 117 |
|
110 | 118 | print "x0_zero = {0}\n" |
111 | 119 | set n x0_zero |
@@ -270,31 +278,48 @@ loop: |
270 | 278 | op add ret @counter 1 |
271 | 279 | jump format_hex always |
272 | 280 |
|
273 | | - print "pc = {0}\n" |
274 | | - set n pc |
275 | | - op add ret @counter 1 |
276 | | - jump format_hex always |
| 281 | + print "cycle = {0}\n" |
| 282 | + format cycle |
277 | 283 |
|
278 | | - print "state = {0}\n" |
279 | | - format state |
| 284 | + print "time = {0}\n" |
| 285 | + format time |
280 | 286 |
|
281 | | - print "exit_code = {0}\n" |
282 | | - format exit_code |
| 287 | + print "instret = {0}\n" |
| 288 | + format instret |
283 | 289 |
|
284 | 290 | draw print 7 300 topLeft |
285 | 291 | drawflush DISPLAY |
286 | 292 |
|
287 | | - print "@ipt = {0}\n" |
| 293 | + print "@ipt = {0}\n" |
288 | 294 | format ipt |
289 | 295 |
|
290 | | - print "cycle = {0}\n" |
291 | | - format cycle |
| 296 | + print "state = {0}\n" |
| 297 | + format state |
292 | 298 |
|
293 | | - print "time = {0}\n" |
294 | | - format time |
| 299 | + print "decode_time = {0} ms\n" |
| 300 | + format decode_time |
295 | 301 |
|
296 | | - print "instret = {0}\n" |
297 | | - format instret |
| 302 | + print "exit_code = {0}\n\n" |
| 303 | + format exit_code |
| 304 | + |
| 305 | + print "pc = {0}\n" |
| 306 | + set n pc |
| 307 | + op add ret @counter 1 |
| 308 | + jump format_hex always |
| 309 | + |
| 310 | + print "op_id = {0}\n" |
| 311 | + set n op_id |
| 312 | + op add ret @counter 1 |
| 313 | + jump format_op_id always |
| 314 | + |
| 315 | + print "arg1 = {0}\n" |
| 316 | + format arg1 |
| 317 | + |
| 318 | + print "arg2 = {0}\n" |
| 319 | + format arg2 |
| 320 | + |
| 321 | + print "arg3 = {0}\n" |
| 322 | + format arg3 |
298 | 323 |
|
299 | 324 | draw print 256 508 topLeft |
300 | 325 | drawflush DISPLAY |
@@ -362,6 +387,60 @@ format_bin__next: |
362 | 387 | format "0b" |
363 | 388 | set @counter ret |
364 | 389 |
|
| 390 | +format_op_id: |
| 391 | + jump format_op_id__unknown greaterThan n 46 |
| 392 | + op mul n n 2 |
| 393 | + op add @counter @counter n |
| 394 | + format "illegal_instruction"; set @counter ret |
| 395 | + format "LUI"; set @counter ret |
| 396 | + format "AUIPC"; set @counter ret |
| 397 | + format "JAL"; set @counter ret |
| 398 | + format "JALR"; set @counter ret |
| 399 | + format "BEQ"; set @counter ret |
| 400 | + format "BNE"; set @counter ret |
| 401 | + format "BLT"; set @counter ret |
| 402 | + format "BGE"; set @counter ret |
| 403 | + format "BLTU"; set @counter ret |
| 404 | + format "BGEU"; set @counter ret |
| 405 | + format "LB"; set @counter ret |
| 406 | + format "LH"; set @counter ret |
| 407 | + format "LW"; set @counter ret |
| 408 | + format "LBU"; set @counter ret |
| 409 | + format "LHU"; set @counter ret |
| 410 | + format "SB"; set @counter ret |
| 411 | + format "SH"; set @counter ret |
| 412 | + format "SW"; set @counter ret |
| 413 | + format "ADDI"; set @counter ret |
| 414 | + format "SLTI"; set @counter ret |
| 415 | + format "SLTIU"; set @counter ret |
| 416 | + format "XORI"; set @counter ret |
| 417 | + format "ORI"; set @counter ret |
| 418 | + format "ANDI"; set @counter ret |
| 419 | + format "SLLI"; set @counter ret |
| 420 | + format "SRLI"; set @counter ret |
| 421 | + format "SRAI"; set @counter ret |
| 422 | + format "ADD"; set @counter ret |
| 423 | + format "SUB"; set @counter ret |
| 424 | + format "SLL"; set @counter ret |
| 425 | + format "SLT"; set @counter ret |
| 426 | + format "SLTU"; set @counter ret |
| 427 | + format "XOR"; set @counter ret |
| 428 | + format "SRL"; set @counter ret |
| 429 | + format "SRA"; set @counter ret |
| 430 | + format "OR"; set @counter ret |
| 431 | + format "AND"; set @counter ret |
| 432 | + format "FENCE"; set @counter ret |
| 433 | + format "ECALL"; set @counter ret |
| 434 | + format "EBREAK"; set @counter ret |
| 435 | + format "CSRRW"; set @counter ret |
| 436 | + format "CSRRS"; set @counter ret |
| 437 | + format "CSRRC"; set @counter ret |
| 438 | + format "CSRRWI"; set @counter ret |
| 439 | + format "CSRRSI"; set @counter ret |
| 440 | + format "CSRRCI"; set @counter ret |
| 441 | +format_op_id__unknown: |
| 442 | + format n; set @counter ret |
| 443 | + |
365 | 444 | # get the variable name in CSRS for the specified CSR |
366 | 445 | # csr -> variable |
367 | 446 | access_csr: |
|
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