Lazily patch debugger, temporarily stub decode instruction, update controller

Author: object-Object

src/cpu/controller.mlog.jinja

@@ -25,9 +25,9 @@ halt:
 reset:
     setrate 1000
 
-    # tell workers to reset
+    # tell workers to halt
     set prev_proc @this
-    set state "reset"
+    set state "halt"
 
     # load config
     read MEMORY_X {{CONFIG}} "MEMORY_X"
@@ -55,7 +55,7 @@ reset:
     # align to tick
     wait 1e-5
 
-    # set prev_proc and state again, just in case a worker changed them
+    # change state from halt to reset, and set prev_proc again in case a worker changed it
     set prev_proc @this
     set state "reset"
 
@@ -182,7 +182,6 @@ init_incr:
     # default values for writable CSRs
     write 0 {{CSRS}} "{{ 'mepc'|csr }}"
     write 0 {{CSRS}} "{{ 'mscratch'|csr }}"
-    write 0 {{CSRS}} "{{ 'mcause'|csr }}"
     write 0 {{CSRS}} "{{ 'mtval'|csr }}"
 
     # finally, tick-align again to be safe, finish any last-second initialization, then start the workers
@@ -235,9 +234,6 @@ end_pause:
     sensor enabled {{POWER_SWITCH}} @enabled
     jump halt equal enabled false
 
-    sensor enabled {{PAUSE_SWITCH}} @enabled
-    jump pause_once equal enabled true
-
     # update time
     # TODO: handle mtimeh/mcycleh overflow
 
@@ -295,7 +291,6 @@ end_pause:
 
 pause:
     control enabled {{SINGLE_STEP_SWITCH}} true
-pause_once:
     control enabled {{PAUSE_SWITCH}} true
 
 pause__loop:

src/cpu/worker.mlog.jinja

@@ -1965,6 +1965,15 @@ MLOGSYS:
     jump end_instruction always
 
 MLOGSYS__init_icache:
+    # FIXME: hack
+    setrate 500000
+    set state "decoding"
+
+    print "decoding @ {0} {1}"
+    format @thisx
+    format @thisy
+    printflush {{ERROR_OUTPUT}}
+
     op min __etext __etext ICACHE_SIZE
 
     # decode .text
@@ -1983,7 +1992,17 @@ MLOGSYS__init_icache__loop:
     op add decode_address decode_address 4
     jump MLOGSYS__init_icache__loop lessThan decode_address __etext
 
-    jump end_instruction always
+    # FIXME: hack 2
+    setrate 1000
+    wait 1e-5
+
+    read controller_state {{CONTROLLER}} "state"
+    jump state->halt equal controller_state "halt"
+
+    read prev_proc {{CONTROLLER}} "prev_proc"
+    write "running" prev_proc "state"
+    printflush {{ERROR_OUTPUT}}
+    jump next_tick always
 
 MLOGDRAW:
     # I-type: rs1, imm=funct12, rd_id

src/peripherals/debugger.mlog.jinja

@@ -193,7 +193,7 @@ loop:
     read mtval CSRS "{{ 'mtval'|csr }}"
 
     read ipt CPU "IPT"
-    read state CPU "STATE"
+    read state CPU "state"
     read pc CPU "pc"
     read op_id CPU "op_id"
     read rs1 CPU "rs1_id"