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Commit d7ac67b

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author
Russell King (Oracle)
committed
Merge branches 'fixes' and 'misc' into for-linus
2 parents 657a292 + 2335c9c commit d7ac67b

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12 files changed

+31
-15
lines changed

12 files changed

+31
-15
lines changed

arch/arm/Kconfig

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ config ARM
8686
select HAVE_ARCH_PFN_VALID
8787
select HAVE_ARCH_SECCOMP
8888
select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
89+
select HAVE_ARCH_STACKLEAK
8990
select HAVE_ARCH_THREAD_STRUCT_WHITELIST
9091
select HAVE_ARCH_TRACEHOOK
9192
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE
@@ -115,6 +116,7 @@ config ARM
115116
select HAVE_KERNEL_XZ
116117
select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
117118
select HAVE_KRETPROBES if HAVE_KPROBES
119+
select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
118120
select HAVE_MOD_ARCH_SPECIFIC
119121
select HAVE_NMI
120122
select HAVE_OPTPROBES if !THUMB2_KERNEL
@@ -735,7 +737,7 @@ config ARM_ERRATA_764319
735737
bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
736738
depends on CPU_V7
737739
help
738-
This option enables the workaround for the 764319 Cortex A-9 erratum.
740+
This option enables the workaround for the 764319 Cortex-A9 erratum.
739741
CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
740742
unexpected Undefined Instruction exception when the DBGSWENABLE
741743
external pin is set to 0, even when the CP14 accesses are performed

arch/arm/boot/compressed/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ OBJS =
99

1010
HEAD = head.o
1111
OBJS += misc.o decompress.o
12+
CFLAGS_decompress.o += $(DISABLE_STACKLEAK_PLUGIN)
1213
ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y)
1314
OBJS += debug.o
1415
AFLAGS_head.o += -DDEBUG

arch/arm/boot/compressed/vmlinux.lds.S

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ SECTIONS
125125

126126
. = BSS_START;
127127
__bss_start = .;
128-
.bss : { *(.bss) }
128+
.bss : { *(.bss .bss.*) }
129129
_end = .;
130130

131131
. = ALIGN(8); /* the stack must be 64-bit aligned */

arch/arm/include/asm/stacktrace.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,13 @@ struct stackframe {
2626
#endif
2727
};
2828

29+
static inline bool on_thread_stack(void)
30+
{
31+
unsigned long delta = current_stack_pointer ^ (unsigned long)current->stack;
32+
33+
return delta < THREAD_SIZE;
34+
}
35+
2936
static __always_inline
3037
void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame)
3138
{

arch/arm/include/asm/vmlinux.lds.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
#define PROC_INFO \
4343
. = ALIGN(4); \
4444
__proc_info_begin = .; \
45-
*(.proc.info.init) \
45+
KEEP(*(.proc.info.init)) \
4646
__proc_info_end = .;
4747

4848
#define IDMAP_TEXT \

arch/arm/kernel/entry-armv.S

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1065,6 +1065,7 @@ vector_addrexcptn:
10651065
.globl vector_fiq
10661066

10671067
.section .vectors, "ax", %progbits
1068+
.reloc .text, R_ARM_NONE, .
10681069
W(b) vector_rst
10691070
W(b) vector_und
10701071
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi )
@@ -1078,6 +1079,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi )
10781079

10791080
#ifdef CONFIG_HARDEN_BRANCH_HISTORY
10801081
.section .vectors.bhb.loop8, "ax", %progbits
1082+
.reloc .text, R_ARM_NONE, .
10811083
W(b) vector_rst
10821084
W(b) vector_bhb_loop8_und
10831085
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi )
@@ -1090,6 +1092,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi )
10901092
W(b) vector_bhb_loop8_fiq
10911093

10921094
.section .vectors.bhb.bpiall, "ax", %progbits
1095+
.reloc .text, R_ARM_NONE, .
10931096
W(b) vector_rst
10941097
W(b) vector_bhb_bpiall_und
10951098
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi )

arch/arm/kernel/entry-common.S

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,9 @@ no_work_pending:
119119

120120
ct_user_enter save = 0
121121

122+
#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
123+
bl stackleak_erase_on_task_stack
124+
#endif
122125
restore_user_regs fast = 0, offset = 0
123126
ENDPROC(ret_to_user_from_irq)
124127
ENDPROC(ret_to_user)

arch/arm/kernel/module.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -395,11 +395,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
395395
return 0;
396396
}
397397

398-
struct mod_unwind_map {
399-
const Elf_Shdr *unw_sec;
400-
const Elf_Shdr *txt_sec;
401-
};
402-
403398
static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
404399
const Elf_Shdr *sechdrs, const char *name)
405400
{

arch/arm/kernel/vmlinux-xip.lds.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ SECTIONS
6363
. = ALIGN(4);
6464
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
6565
__start___ex_table = .;
66-
ARM_MMU_KEEP(*(__ex_table))
66+
ARM_MMU_KEEP(KEEP(*(__ex_table)))
6767
__stop___ex_table = .;
6868
}
6969

@@ -83,7 +83,7 @@ SECTIONS
8383
}
8484
.init.arch.info : {
8585
__arch_info_begin = .;
86-
*(.arch.info.init)
86+
KEEP(*(.arch.info.init))
8787
__arch_info_end = .;
8888
}
8989
.init.tagtable : {

arch/arm/kernel/vmlinux.lds.S

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ SECTIONS
7474
. = ALIGN(4);
7575
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
7676
__start___ex_table = .;
77-
ARM_MMU_KEEP(*(__ex_table))
77+
ARM_MMU_KEEP(KEEP(*(__ex_table)))
7878
__stop___ex_table = .;
7979
}
8080

@@ -99,7 +99,7 @@ SECTIONS
9999
}
100100
.init.arch.info : {
101101
__arch_info_begin = .;
102-
*(.arch.info.init)
102+
KEEP(*(.arch.info.init))
103103
__arch_info_end = .;
104104
}
105105
.init.tagtable : {
@@ -116,7 +116,7 @@ SECTIONS
116116
#endif
117117
.init.pv_table : {
118118
__pv_table_begin = .;
119-
*(.pv_table)
119+
KEEP(*(.pv_table))
120120
__pv_table_end = .;
121121
}
122122

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