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Copy file name to clipboardExpand all lines: README.md
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To install Level Zero, refer to the instructions in [Intel® Graphics Compute Runtime for oneAPI Level Zero and OpenCL™ Driver repository](https://github.com/intel/compute-runtime/releases) or to the [installation guide](https://dgpu-docs.intel.com/installation-guides/index.html) for oneAPI users.
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## Installation
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Intel® SHMEM requires a host SHMEM back-end to be used for host-sided operations support. In particular, it relies on an a collection of extension APIs (`shmemx_heap_create`, `shmemx_heap_preinit`, and `shmemx_heap_postinit`) to coordinate the Intel® SHMEM and OpenSHMEM heaps. We recommend [Sandia OpenSHMEM](https://github.com/Sandia-OpenSHMEM/SOS) for this purpose.
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Intel® SHMEM requires a host OpenSHMEM back-end to be used for host-sided operations support. In particular, it relies on a collection of extension APIs (`shmemx_heap_create`, `shmemx_heap_preinit`, and `shmemx_heap_postinit`) to coordinate the Intel® SHMEM and OpenSHMEM heaps. We recommend [Sandia OpenSHMEM v1.5.3rc1](https://github.com/Sandia-OpenSHMEM/SOS/releases/tag/v1.5.3rc1) or newer for this purpose.
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### Building Sandia OpenSHMEM (SOS)
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Download the SOS repo to be configured as a back-end for Intel® SHMEM.
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```
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git clone https://github.com/Sandia-OpenSHMEM/SOS.git SOS
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git clone --recurse-submodules https://github.com/Sandia-OpenSHMEM/SOS.git SOS
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```
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Build SOS following instructions below. `FI_HMEM` support in the provider is required for use with Intel® SHMEM. To enable `FI_HMEM` with a supported provider, we recommend a specific set of config flags. Below are two examples for configuring and building SOS with two providers supporting `FI_HMEM`. To configure SOS with the `verbs;ofi_rxm` provider, use the following instructions:
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Please choose an appropriate PMI configure flag based on the available PMI client library in the system. Please check for further instructions on [SOS Wiki pages](https://github.com/Sandia-OpenSHMEM/SOS/wiki). Optionally, users may also choose to add `--disable-fortran` since fortran interfaces will not be used.
Copy file name to clipboardExpand all lines: RELEASE_NOTES.md
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# Release Notes <!-- omit in toc -->
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This document contains a list of new features and known limitations of Intel® SHMEM in the most recent release.
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This document contains a list of new features and known limitations of Intel® SHMEM releases.
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## Release 1.1.0
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### New Features and Enhancements
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- Support for OpenSHMEM 1.5 teams and team-based collective operations.
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- Device and host API support for strided RMA operations - ibput and ibget, from OpenSHMEM 1.6.
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- Device and host API support for non-blocking atomic operations.
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- Device and host API support for size-based RMA and signaling operations.
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- Device and host API support for all/any/some versions of point-to-point synchronization operations.
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- Device and host API support for signal set, add, and wait-until operations.
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- Fixed implementation of `ishmem_free`.
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- Compatible with [Sandia OpenSHMEM (SOS)](https://github.com/Sandia-OpenSHMEM/SOS) v1.5.3rc1 and newer releases.
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- Support for [OFI](https://github.com/ofiwg/libfabric) PSM3 provider enabled networks via SOS.
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- Updated [specification](https://oneapi-src.github.io/ishmem/intro.html) with the teams API, size-based RMA, non-blocking AMO, team-based collectives, all/any/some flavors of synchronization operations, utility extensions for print messages, etc.
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- An improved and additional set of [unit tests](test/unit/SHMEM) covering functionality of the new APIs.
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- New [examples](examples/SHMEM) illustrating use cases of Intel® SHMEM functionalities including the Teams APIs.
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- Updated [launcher script](scripts/ishmrun) to launch Intel® SHMEM applications on the available SYCL devices in the system.
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### Known Limitations
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- Only [Sandia OpenSHMEM](https://github.com/Sandia-OpenSHMEM/SOS) is currently supported as the host back-end.
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- Not all APIs from OpenSHMEM standard are supported. Please refer to [Supported/Unsupported Features](https://oneapi-src.github.io/ishmem/supported_features.html) to get a complete view.
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- Intel® SHMEM requires a one-to-one mapping of PEs to SYCL devices. This implies that Intel® SHMEM executions must launch with a number of processes on each compute node that is no more than the number of available SYCL devices on each one of those nodes. By default, the Intel® SHMEM runtime considers each individual device tile to make up a single SYCL device and assigns a tile per PE.
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- All collective operations within a kernel must complete before invoking subsequent kernel-initiated collective operation.
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- To run Intel® SHMEM with SOS enabling the Slingshot provider in OFI, environment variable `FI_CXI_OPTIMIZED_MRS=0` must be used. It is also recommended to use `FI_CXI_DEFAULT_CQ_SIZE=131072`.
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- To run Intel® SHMEM with SOS enabling the verbs provider, environment variable `MLX5_SCATTER_TO_CQE=0` must be used.
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- Inter-node communication in Intel® SHMEM requires [dma-buf](https://www.kernel.org/doc/html/latest/driver-api/dma-buf.html) support in the Linux kernel. Inter-node functionality in Intel® SHMEM Release 1.1.0 is tested with SUSE Linux Enterprise Server 15 SP4.
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