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[FPGA] Add support for the FPGA simulator (#1137)
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‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_ivdep/README.md‎

Lines changed: 17 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -194,9 +194,13 @@ To learn more about the extensions and how to configure the oneAPI environment,
194194
2. Compile the design through the generated `Makefile`. The following build targets are provided, matching the recommended development flow:
195195

196196
* Compile for emulation (fast compile time, targets emulated FPGA device):
197-
```
198-
make fpga_emu
199-
```
197+
```
198+
make fpga_emu
199+
```
200+
* Compile for simulation (fast compile time, targets simulator FPGA device):
201+
```
202+
make fpga_sim
203+
```
200204
* Generate the optimization report:
201205
```
202206
make report
@@ -234,6 +238,10 @@ To learn more about the extensions and how to configure the oneAPI environment,
234238
```
235239
nmake fpga_emu
236240
```
241+
* Compile for simulation (fast compile time, targets simulator FPGA device):
242+
```
243+
nmake fpga_sim
244+
```
237245
* Generate the optimization report:
238246
```
239247
nmake report
@@ -277,7 +285,12 @@ You should see a message similar to "Compiler failed to schedule this loop with
277285
./loop_ivdep.fpga_emu (Linux)
278286
loop_ivdep.fpga_emu.exe (Windows)
279287
```
280-
2. Run the sample on the FPGA device:
288+
2. Run the sample on the FPGA simulator device:
289+
```
290+
./loop_ivdep.fpga_sim (Linux)
291+
loop_ivdep.fpga_sim.exe (Windows)
292+
```
293+
3. Run the sample on the FPGA device:
281294
```
282295
./loop_ivdep.fpga (Linux)
283296
loop_ivdep.fpga.exe (Windows)

‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_ivdep/src/CMakeLists.txt‎

100755100644
Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
set(SOURCE_FILE loop_ivdep.cpp)
55
set(TARGET_NAME loop_ivdep)
66
set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu)
7+
set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim)
78
set(FPGA_TARGET ${TARGET_NAME}.fpga)
89

910
# FPGA board selection
@@ -27,9 +28,11 @@ endif()
2728
# For this reason, FPGA backend flags must be passed as link flags in CMake.
2829
set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR")
2930
set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga")
31+
set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR")
32+
set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
3033
set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga")
3134
set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
32-
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA backend compilation
35+
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA simulator compilation and backend compilation
3336

3437
###############################################################################
3538
### FPGA Emulator
@@ -45,6 +48,20 @@ set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_CO
4548
set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}")
4649
add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET})
4750

51+
###############################################################################
52+
### FPGA Simulator
53+
###############################################################################
54+
# To compile in a single command:
55+
# dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> -DFPGA_SIMULATOR loop_ivdep.cpp -o loop_ivdep.fpga_sim
56+
# CMake executes:
57+
# [compile] dpcpp -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_ivdep.cpp.o -c loop_ivdep.cpp
58+
# [link] dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> loop_ivdep.cpp.o -o loop_ivdep.fpga_sim
59+
add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE})
60+
target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include)
61+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}")
62+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}")
63+
add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET})
64+
4865
###############################################################################
4966
### Generate Report
5067
###############################################################################

‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_ivdep/src/loop_ivdep.cpp‎

Lines changed: 16 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,11 @@
1010

1111
#include "exception_handler.hpp"
1212

13-
constexpr size_t kRowLength = 128;
13+
#if defined(FPGA_SIMULATOR)
14+
constexpr size_t kRowLength = 16;
15+
#else
16+
constexpr size_t kRowLength = 128;
17+
#endif
1418
constexpr size_t kMinSafelen = 1;
1519
constexpr size_t kMaxSafelen = kRowLength;
1620
constexpr size_t kMatrixSize = kRowLength * kRowLength;
@@ -22,9 +26,16 @@ using namespace sycl;
2226
template <size_t safe_len> class KernelCompute;
2327

2428
template <size_t safe_len>
25-
void TransposeAndFold(const device_selector &selector,
26-
const std::array<float, kMatrixSize> &m_input,
29+
void TransposeAndFold(const std::array<float, kMatrixSize> &m_input,
2730
std::array<float, kMatrixSize> &m_output) {
31+
#if defined(FPGA_EMULATOR)
32+
ext::intel::fpga_emulator_selector selector;
33+
#elif defined(FPGA_SIMULATOR)
34+
ext::intel::fpga_simulator_selector selector;
35+
#else
36+
ext::intel::fpga_selector selector;
37+
#endif
38+
2839
double kernel_time = 0;
2940
try {
3041
queue q(selector, fpga_tools::exception_handler,
@@ -104,16 +115,10 @@ int main() {
104115
A[i] = static_cast<float>(rand()) / static_cast<float>(RAND_MAX);
105116
}
106117

107-
#if defined(FPGA_EMULATOR)
108-
ext::intel::fpga_emulator_selector selector;
109-
#else
110-
ext::intel::fpga_selector selector;
111-
#endif
112-
113118
// Instantiate kernel logic with the min and max correct safelen parameter
114119
// to compare performance.
115-
TransposeAndFold<kMinSafelen>(selector, A, B);
116-
TransposeAndFold<kMaxSafelen>(selector, A, C);
120+
TransposeAndFold<kMinSafelen>(A, B);
121+
TransposeAndFold<kMaxSafelen>(A, C);
117122
// You can also try removing the ivdep from the kernel entirely and
118123
// recompiling to see what effect this has on performance.
119124

‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/README.md‎

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -149,9 +149,13 @@ To learn more about the extensions and how to configure the oneAPI environment,
149149
2. Compile the design through the generated `Makefile`. The following build targets are provided, matching the recommended development flow:
150150

151151
* Compile for emulation (fast compile time, targets emulated FPGA device):
152-
```
153-
make fpga_emu
154-
```
152+
```
153+
make fpga_emu
154+
```
155+
* Compile for simulation (fast compile time, targets simulator FPGA device):
156+
```
157+
make fpga_sim
158+
```
155159
* Generate the optimization report:
156160
```
157161
make report
@@ -189,6 +193,10 @@ To learn more about the extensions and how to configure the oneAPI environment,
189193
```
190194
nmake fpga_emu
191195
```
196+
* Compile for simulation (fast compile time, targets simulator FPGA device):
197+
```
198+
nmake fpga_sim
199+
```
192200
* Generate the optimization report:
193201
```
194202
nmake report
@@ -224,12 +232,17 @@ You can also check the achieved system f<sub>MAX</sub> to verify the earlier cal
224232
225233
## Running the Sample
226234
227-
1. Run the sample on the FPGA emulator (the kernel executes on the CPU):
235+
1. Run the sample on the FPGA emulator (the kernel executes on the CPU):
228236
```
229237
./loop_unroll.fpga_emu (Linux)
230238
loop_unroll.fpga_emu.exe (Windows)
231239
```
232-
2. Run the sample on the FPGA device:
240+
2. Run the sample on the FPGA simulator device:
241+
```
242+
./loop_unroll.fpga_sim (Linux)
243+
loop_unroll.fpga_sim.exe (Windows)
244+
```
245+
3. Run the sample on the FPGA device:
233246
```
234247
./loop_unroll.fpga (Linux)
235248
loop_unroll.fpga.exe (Windows)

‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/CMakeLists.txt‎

100755100644
Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
set(SOURCE_FILE loop_unroll.cpp)
55
set(TARGET_NAME loop_unroll)
66
set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu)
7+
set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim)
78
set(FPGA_TARGET ${TARGET_NAME}.fpga)
89

910
# FPGA board selection
@@ -27,9 +28,11 @@ endif()
2728
# For this reason, FPGA backend flags must be passed as link flags in CMake.
2829
set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR")
2930
set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga")
31+
set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR")
32+
set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
3033
set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga")
3134
set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
32-
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA backend compilation
35+
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA simulator compilation and backend compilation
3336

3437
###############################################################################
3538
### FPGA Emulator
@@ -45,6 +48,20 @@ set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_CO
4548
set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}")
4649
add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET})
4750

51+
###############################################################################
52+
### FPGA Simulator
53+
###############################################################################
54+
# To compile in a single command:
55+
# dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> -DFPGA_SIMULATOR loop_unroll.cpp -o loop_unroll.fpga_sim
56+
# CMake executes:
57+
# [compile] dpcpp -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp
58+
# [link] dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> loop_unroll.cpp.o -o loop_unroll.fpga_sim
59+
add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE})
60+
target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include)
61+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}")
62+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}")
63+
add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET})
64+
4865
###############################################################################
4966
### Generate Report
5067
###############################################################################

‎DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/loop_unroll.cpp‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,8 @@ void VecAdd(const std::vector<float> &summands1,
2929

3030
#if defined(FPGA_EMULATOR)
3131
ext::intel::fpga_emulator_selector device_selector;
32+
#elif defined(FPGA_SIMULATOR)
33+
ext::intel::fpga_simulator_selector device_selector;
3234
#else
3335
ext::intel::fpga_selector device_selector;
3436
#endif
@@ -66,7 +68,11 @@ void VecAdd(const std::vector<float> &summands1,
6668
std::cout << "Throughput for kernel with unroll_factor " << unroll_factor
6769
<< ": ";
6870
std::cout << std::fixed << std::setprecision(3)
71+
#if defined(FPGA_SIMULATOR)
72+
<< ((double)array_size / kernel_time) / 1e3f << " MFlops\n";
73+
#else
6974
<< ((double)array_size / kernel_time) / 1e6f << " GFlops\n";
75+
#endif
7076

7177
} catch (sycl::exception const &e) {
7278
// Catches exceptions in the host code
@@ -85,7 +91,11 @@ void VecAdd(const std::vector<float> &summands1,
8591
}
8692

8793
int main(int argc, char *argv[]) {
94+
#if defined(FPGA_SIMULATOR)
95+
size_t array_size = 1 << 10;
96+
#else
8897
size_t array_size = 1 << 26;
98+
#endif
8999

90100
if (argc > 1) {
91101
std::string option(argv[1]);

‎DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/README.md‎

Lines changed: 17 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -101,9 +101,13 @@ To learn more about the extensions and how to configure the oneAPI environment,
101101
2. Compile the design through the generated `Makefile`. The following build targets are provided, matching the recommended development flow:
102102

103103
* Compile for emulation (fast compile time, targets emulated FPGA device):
104-
```
105-
make fpga_emu
106-
```
104+
```
105+
make fpga_emu
106+
```
107+
* Compile for simulation (fast compile time, targets simulator FPGA device):
108+
```
109+
make fpga_sim
110+
```
107111
* Generate the optimization report:
108112
```
109113
make report
@@ -142,6 +146,10 @@ To learn more about the extensions and how to configure the oneAPI environment,
142146
```
143147
nmake fpga_emu
144148
```
149+
* Compile for simulation (fast compile time, targets simulator FPGA device):
150+
```
151+
nmake fpga_sim
152+
```
145153
* Generate the optimization report:
146154
```
147155
nmake report
@@ -191,7 +199,12 @@ The area usage information can also be accessed on the main report page in the S
191199
./max_interleaving.fpga_emu (Linux)
192200
max_interleaving.fpga_emu.exe (Windows)
193201
```
194-
2. Run the sample on the FPGA device:
202+
2. Run the sample on the FPGA simulator device:
203+
```
204+
./max_interleaving.fpga_sim (Linux)
205+
max_interleaving.fpga_sim.exe (Windows)
206+
```
207+
3. Run the sample on the FPGA device:
195208
```
196209
./max_interleaving.fpga (Linux)
197210
max_interleaving.fpga.exe (Windows)

‎DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/CMakeLists.txt‎

100755100644
Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
set(SOURCE_FILE max_interleaving.cpp)
55
set(TARGET_NAME max_interleaving)
66
set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu)
7+
set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim)
78
set(FPGA_TARGET ${TARGET_NAME}.fpga)
89

910
# FPGA board selection
@@ -27,9 +28,11 @@ endif()
2728
# For this reason, FPGA backend flags must be passed as link flags in CMake.
2829
set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR")
2930
set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga")
31+
set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR")
32+
set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
3033
set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga")
3134
set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}")
32-
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA backend compilation
35+
# use cmake -D USER_HARDWARE_FLAGS=<flags> to set extra flags for FPGA simulator compilation and backend compilation
3336

3437

3538
###############################################################################
@@ -46,6 +49,20 @@ set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_CO
4649
set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}")
4750
add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET})
4851

52+
###############################################################################
53+
### FPGA Simulator
54+
###############################################################################
55+
# To compile in a single command:
56+
# dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> -DFPGA_SIMULATOR max_interleaving.cpp -o max_interleaving.fpga_sim
57+
# CMake executes:
58+
# [compile] dpcpp -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o max_interleaving.cpp.o -c max_interleaving.cpp
59+
# [link] dpcpp -fintelfpga -Xssimulation -Xsghdl -Xstarget=<FPGA_DEVICE> max_interleaving.cpp.o -o max_interleaving.fpga_sim
60+
add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE})
61+
target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include)
62+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}")
63+
set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}")
64+
add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET})
65+
4966
###############################################################################
5067
### Generate Report
5168
###############################################################################

‎DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp‎

Lines changed: 16 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,16 @@ class KernelCompute;
3434
// The kernel's functionality is designed to show the
3535
// performance impact of the max_interleaving attribute.
3636
template <int interleaving>
37-
void Transform(const device_selector &selector, const TwoDimFloatArray &array_a,
38-
const FloatArray &array_b, FloatArray &array_r) {
37+
void Transform(const TwoDimFloatArray &array_a, const FloatArray &array_b,
38+
FloatArray &array_r) {
39+
#if defined(FPGA_EMULATOR)
40+
ext::intel::fpga_emulator_selector selector;
41+
#elif defined(FPGA_SIMULATOR)
42+
ext::intel::fpga_simulator_selector selector;
43+
#else
44+
ext::intel::fpga_selector selector;
45+
#endif
46+
3947
double kernel_time = 0.0;
4048

4149
try {
@@ -112,7 +120,11 @@ void Transform(const device_selector &selector, const TwoDimFloatArray &array_a,
112120
std::cout << "Throughput for kernel with max_interleaving " << interleaving
113121
<< ": ";
114122
std::cout << std::fixed << std::setprecision(3)
123+
#if defined(FPGA_SIMULATOR)
124+
<< ((double)(kTotalOps) / kernel_time) << " KFlops\n";
125+
#else
115126
<< ((double)(kTotalOps) / kernel_time) / 1e6f << " GFlops\n";
127+
#endif
116128
}
117129

118130
// Calculates the expected results. Used to verify that the kernel
@@ -145,21 +157,15 @@ int main() {
145157
outdata_R_golden[i] = 1.0;
146158
}
147159

148-
#if defined(FPGA_EMULATOR)
149-
ext::intel::fpga_emulator_selector selector;
150-
#else
151-
ext::intel::fpga_selector selector;
152-
#endif
153-
154160
// Run the kernel with two different values of the max_interleaving
155161
// attribute. In this case, unlimited interleaving (max_interleaving
156162
// set to 0) gives no improvement in runtime performance over
157163
// restricted interleaving (max_interleaving set to 1), despite
158164
// requiring more hardware resources (see README.md for details
159165
// on confirming this difference in hardware resource usage in
160166
// the reports).
161-
Transform<0>(selector, indata_A, indata_B, outdata_R_compute_0);
162-
Transform<1>(selector, indata_A, indata_B, outdata_R_compute_1);
167+
Transform<0>(indata_A, indata_B, outdata_R_compute_0);
168+
Transform<1>(indata_A, indata_B, outdata_R_compute_1);
163169

164170
// compute the actual result here
165171
GoldenResult(indata_A, indata_B, outdata_R_golden);

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