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FPGA: Revert "Remove fpga_register annotations from fifo_sort" (#2370)
This reverts commit 75397ca that initially went in to prevent an error from being emitted to customers.
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  • DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/db/src/db_utils

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DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/db/src/db_utils/fifo_sort.hpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -272,9 +272,9 @@ class Preloader {
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// preloaded_data_: registers for storing the preloaded data
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// data_in_flight_: data in flight
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// valids_in_flight_: load decisions in flight
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T preloaded_data_[sz_preload];
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T data_in_flight_[ld_dist];
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bool valids_in_flight_[ld_dist];
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[[intel::fpga_register]] T preloaded_data_[sz_preload];
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[[intel::fpga_register]] T data_in_flight_[ld_dist];
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[[intel::fpga_register]] bool valids_in_flight_[ld_dist];
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// preload_count_ stores the address where to insert the next item in
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// preloaded_data_.
@@ -312,12 +312,12 @@ class Preloader {
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// Computation of each index of preloaded_data_ == preload_count_, precomputed
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// in advance of EnqueueFront to remove compare from the critical path
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bool preload_count_equal_indices_[sz_preload];
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[[intel::fpga_register]] bool preload_count_equal_indices_[sz_preload];
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// Computation of each index of preloaded_data_ == preload_count_dec_,
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// precomputed in advance of EnqueueFront to remove compare from the critical
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// path
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bool preload_count_dec_equal_indices_[sz_preload];
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[[intel::fpga_register]] bool preload_count_dec_equal_indices_[sz_preload];
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bool CheckEmpty() { return empty_counter_ < 0; }
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