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DirectProgramming/C++SYCL/DenseLinearAlgebra/vector-add/README.md

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@@ -322,41 +322,6 @@ The source files (`vector-add-buffers.cpp` and `vector-add-usm.cpp`) specify the
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vector-add-usm.fpga.exe
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```
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### Build and Run the `Base: Vector Add` Sample in Intel® DevCloud (Optional)
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When running a sample in the Intel® DevCloud, you must specify the compute node (CPU, GPU, FPGA) and whether to run in batch or interactive mode.
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>**Note**: Since Intel® DevCloud for oneAPI includes the appropriate development environment already configured, you do not need to set environment variables.
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Use the Linux instructions to build and run the program.
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You can specify a GPU node using a single line script.
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```
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qsub -I -l nodes=1:gpu:ppn=2 -d .
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```
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- `-I` (upper case I) requests an interactive session.
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- `-l nodes=1:gpu:ppn=2` (lower case L) assigns one full GPU node.
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- `-d .` makes the current folder as the working directory for the task.
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|Available Nodes |Command Options
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|:--- |:---
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|GPU |`qsub -l nodes=1:gpu:ppn=2 -d .`
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|CPU |`qsub -l nodes=1:xeon:ppn=2 -d .`
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|FPGA Compile Time |`qsub -l nodes=1:fpga_compile:ppn=2 -d .`
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|FPGA Runtime (Arria 10) |`qsub -l nodes=1:fpga_runtime:arria10:ppn=2 -d .`
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>**Note**: For more information on how to specify compute nodes, read [Launch and manage jobs](https://devcloud.intel.com/oneapi/documentation/job-submission/) in the Intel® DevCloud for oneAPI Documentation.
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Only `fpga_compile` nodes support compiling to FPGA. When compiling for FPGA hardware, increase the job timeout to **24 hours**.
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Executing programs on FPGA hardware is only supported on `fpga_runtime` nodes of the appropriate type, such as `fpga_runtime:arria10`.
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Neither compiling nor executing programs on FPGA hardware are supported on the login nodes. For more information, see the Intel® DevCloud for oneAPI [*Intel® oneAPI Base Toolkit Get Started*](https://devcloud.intel.com/oneapi/get_started/) page.
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## Example Output
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```
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Running on device: Intel(R) Gen(R) HD Graphics NEO

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