Add minutes for 06-22-2023 Hardware SIG (#122)

* Add minutes for 06-22-2023 Hardware SIG

Signed-off-by: Jaime Arteaga <[email protected]>

* add presentations

Signed-off-by: Jaime Arteaga <[email protected]>

* Fix formatting

Signed-off-by: Jaime Arteaga <[email protected]>

* Address comments

Signed-off-by: Jaime Arteaga <[email protected]>

* Fix some formating

Signed-off-by: Jaime Arteaga <[email protected]>

* add link to slides

Signed-off-by: Jaime Arteaga <[email protected]>

---------

Signed-off-by: Jaime Arteaga <[email protected]>

Author: jandres742

hardware/README.rst

@@ -15,6 +15,154 @@ To find out how to join the Hardware SIG `get in touch. <https://www.oneapi.io/c
 Meeting Notes
 =============
 
+2023-06-22
+==========
+
+Agenda
+------
+
+* Consistent timestamp reporting in Level Zero, Matias Cabral
+* Level Zero port for TornadoVM + the SPIR-V code gen, Juan Fumero
+* Tiles-as-devices model in Level Zero, Jaime Arteaga
+* Level Zero and Unified Runtime general updates,
+  Jaime Arteaga Molina, Alastair Murray
+
+Attendees
+---------
+
+.. list-table::
+
+
+   * - Alison L Richards, Intel
+     - Jaime Arteaga Molina, Intel
+     - Michal Mrozek, Intel
+   * - Alastair Murray, Codeplay
+     - Brice Videau, Intel
+     - Matias Cabral, Intel
+   * - Juan Fumero, The University of Manchester
+     - Kenneth Benzie, Codeplay
+     - Ben Ashbaugh, Intel
+   * - Brice Goglin
+     - John Daniel Holmes, Intel
+     - Ruyman Reyes, Codeplay
+   * - Kevin Harms, ANL
+     - Xinmin Tian, Intel
+     - Rod Burns, Codeplay
+   * - Brandon Yates, Intel
+     - Dorothee Marie Clotilde Balas, Intel
+     -
+
+Consistent timestamp reporting in Level Zero
+--------------------------------------------
+
+`Slides <presentations/L0_timestamps_units.pdf>`__
+
+* Inconsistency of metrics units for timestamps in
+  Level Zero specification.
+* Proposal: Explicit definition of timestamps on ns
+  and resolutions in frequency.
+
+Level Zero port for TornadoVM + the SPIR-V code gen
+---------------------------------------------------
+
+`Slides <presentations/TornadoVM-oneAPIHardwareSIG-June23.pdf>`__
+
+* Work on extending TornadoVM to run on oneAPI stack,
+  focusing on Level Zero.
+* Current access to heterogeneous systems is fragmented
+  with different stack for CPU and GPU.
+* What if access to these hardware could be done from
+  existing high-level programming languages.
+* TornadoVM translates for instance Java Bytecode
+  into CUDA, OpenCL, or SPIRV.
+* Translation is done by using ACC annotations.
+* TaskGraphs methods are used to identify functions
+  to accelerate.
+* Found that for some workloads, suggested group size
+  returned by L0 driver is not as optimal as the one
+  found heuristically by application.
+* Garbage Collector needs to be controlled to avoid
+  failures when dealing with memory moved to an accelerator.
+* Some suggestions for L0:
+
+  * Migration counters.
+  * Async exception support.
+  * Device aggregation.
+  * Improvements to suggested group size returned by L0.
+  * Questions:
+
+    * Unified runtime would be more useful to this
+      project as a standard?
+
+      To convince Java community to use this software
+      stack a standard is more appealing. Easier to justify
+      a standard because not controlled by one party.
+
+Tiles-as-devices model in Level Zero
+------------------------------------
+
+`Slides <presentations/tiles-as-devices-l0-sig.pdf>`__
+
+* L0 adding support for new device models
+
+  * Mainly aimed at multi-tiled architectures
+  * New environment variable: ZE_FLAT_DEVICE_HIERARCHY
+
+    * Mode 0: Cards-as-devices model
+
+    * Mode 1: Tiles-as-devices model (no access to root device)
+
+    * Mode 2: Tiles-as-devices model (with access to root device)
+
+  * Objective is to provide applications with ability to
+    select best configuration for a given workload, especially
+    when using architectures where access between tiles is
+    more costly than local access.
+  * Changes and new APIs to be added as part of L0 v1.7.
+  * Questions:
+
+    * How is memory allocated between the different modes?
+
+      In mode 0 get device handle and allocations
+      split between two sub-devices (tiles), or could get
+      sub-device and memory will be allocated on that tile.
+      In mode 1 get handle to a tile as device (no sub-devices)
+      and memory is allocated on that tile. No magic.
+
+    * Is ZE_FLAT_DEVICE_HIERARCHY an environment variable?
+
+      Yes.
+
+    * Specification spec will say that mode 1 in the default?
+
+      Up for debate, specification may say that default
+      is implementation defined.
+
+    * In Mode 2 can't do an allocation on root device?
+
+      Yes, you can.zeDeviceGet will return all tiles.
+
+
+Level Zero and Unified Runtime general updates
+----------------------------------------------
+
+`Slides <presentations/Unified-Runtime-for-oneAPI-HW-SIG-062223.pdf>`__
+
+* UR Adapters have been merged to the SYCL runtime.
+* License was previously MIT and now being changed to Apache
+  to make it friendlier with LLVM.
+* Current UR version is v0.6 and close to be tagging next
+  version.
+* All development happening in public UR repo.
+* Experimental features being added as well, such us
+  Command Buffers for graphs and USM import/export.
+* Developers looking to move to UR can build the loader
+  from the UR repo and the adapters from intel/llvm
+  and use the UR interfaces.
+* Application links to UR loader, which would load the
+  UR adapters, which then load the corresponding drivers.
+
+
 2022-11-3
 =========
 
@@ -48,8 +196,8 @@ Attendees
      - Zack Waters, Intel
      -
 
-oneAPI Coummunity Forum
------------------------
+oneAPI Community Forum
+----------------------
 
 * TABs changing to SIGs