@@ -231,6 +231,8 @@ typedef enum ur_function_t {
231231 UR_FUNCTION_COMMAND_BUFFER_UPDATE_WAIT_EVENTS_EXP = 244, ///< Enumerator for ::urCommandBufferUpdateWaitEventsExp
232232 UR_FUNCTION_BINDLESS_IMAGES_MAP_EXTERNAL_LINEAR_MEMORY_EXP = 245, ///< Enumerator for ::urBindlessImagesMapExternalLinearMemoryExp
233233 UR_FUNCTION_ENQUEUE_EVENTS_WAIT_WITH_BARRIER_EXT = 246, ///< Enumerator for ::urEnqueueEventsWaitWithBarrierExt
234+ UR_FUNCTION_TENSOR_MAP_ENCODE_IM_2_COL_EXP = 247, ///< Enumerator for ::urTensorMapEncodeIm2ColExp
235+ UR_FUNCTION_TENSOR_MAP_ENCODE_TILED_EXP = 248, ///< Enumerator for ::urTensorMapEncodeTiledExp
234236 /// @cond
235237 UR_FUNCTION_FORCE_UINT32 = 0x7fffffff
236238 /// @endcond
@@ -10170,6 +10172,207 @@ urEnqueueNativeCommandExp(
1017010172 ///< not NULL, phEvent must not refer to an element of the phEventWaitList array.
1017110173);
1017210174
10175+ #if !defined(__GNUC__)
10176+ #pragma endregion
10177+ #endif
10178+ // Intel 'oneAPI' Unified Runtime Experimental API for mapping tensor objects
10179+ #if !defined(__GNUC__)
10180+ #pragma region tensor_map_(experimental)
10181+ #endif
10182+ ///////////////////////////////////////////////////////////////////////////////
10183+ /// @brief Handle of tensor map object
10184+ typedef struct ur_exp_tensor_map_handle_t_ *ur_exp_tensor_map_handle_t;
10185+
10186+ ///////////////////////////////////////////////////////////////////////////////
10187+ /// @brief Tensor map data type
10188+ typedef uint32_t ur_exp_tensor_map_data_type_flags_t;
10189+ typedef enum ur_exp_tensor_map_data_type_flag_t {
10190+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT8 = UR_BIT(0), ///< 1 byte
10191+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT16 = UR_BIT(1), ///< 2 bytes
10192+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT32 = UR_BIT(2), ///< 4 bytes
10193+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT32 = UR_BIT(3), ///< 4 bytes
10194+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT64 = UR_BIT(4), ///< 8 bytes
10195+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT64 = UR_BIT(5), ///< 8 bytes
10196+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT16 = UR_BIT(6), ///< 2 bytes
10197+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32 = UR_BIT(7), ///< 4 bytes
10198+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT64 = UR_BIT(8), ///< 8 bytes
10199+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_BFLOAT16 = UR_BIT(9), ///< 2 bytes
10200+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32_FTZ = UR_BIT(10), ///< 4 bytes
10201+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32 = UR_BIT(11), ///< 4 bytes
10202+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32_FTZ = UR_BIT(12), ///< 4 bytes
10203+ /// @cond
10204+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FORCE_UINT32 = 0x7fffffff
10205+ /// @endcond
10206+
10207+ } ur_exp_tensor_map_data_type_flag_t;
10208+ /// @brief Bit Mask for validating ur_exp_tensor_map_data_type_flags_t
10209+ #define UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK 0xffffe000
10210+
10211+ ///////////////////////////////////////////////////////////////////////////////
10212+ /// @brief Tensor map interleave
10213+ typedef uint32_t ur_exp_tensor_map_interleave_flags_t;
10214+ typedef enum ur_exp_tensor_map_interleave_flag_t {
10215+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_NONE = UR_BIT(0), ///< No interleave
10216+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_16B = UR_BIT(1), ///< 16B interleave
10217+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_32B = UR_BIT(2), ///< 32B interleave
10218+ /// @cond
10219+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_FORCE_UINT32 = 0x7fffffff
10220+ /// @endcond
10221+
10222+ } ur_exp_tensor_map_interleave_flag_t;
10223+ /// @brief Bit Mask for validating ur_exp_tensor_map_interleave_flags_t
10224+ #define UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK 0xfffffff8
10225+
10226+ ///////////////////////////////////////////////////////////////////////////////
10227+ /// @brief Tensor map l2 promotion
10228+ typedef uint32_t ur_exp_tensor_map_l2_promotion_flags_t;
10229+ typedef enum ur_exp_tensor_map_l2_promotion_flag_t {
10230+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_NONE = UR_BIT(0), ///< No promotion type
10231+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_64B = UR_BIT(1), ///< 64B promotion type
10232+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_128B = UR_BIT(2), ///< 128B promotion type
10233+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_256B = UR_BIT(3), ///< 256B promotion type
10234+ /// @cond
10235+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_FORCE_UINT32 = 0x7fffffff
10236+ /// @endcond
10237+
10238+ } ur_exp_tensor_map_l2_promotion_flag_t;
10239+ /// @brief Bit Mask for validating ur_exp_tensor_map_l2_promotion_flags_t
10240+ #define UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK 0xfffffff0
10241+
10242+ ///////////////////////////////////////////////////////////////////////////////
10243+ /// @brief Tensor map swizzle
10244+ typedef uint32_t ur_exp_tensor_map_swizzle_flags_t;
10245+ typedef enum ur_exp_tensor_map_swizzle_flag_t {
10246+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_NONE = UR_BIT(0), ///< No swizzle
10247+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_32B = UR_BIT(1), ///< 32B swizzle
10248+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_64B = UR_BIT(2), ///< 64B swizzle
10249+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_128B = UR_BIT(3), ///< 128B swizzle
10250+ /// @cond
10251+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_FORCE_UINT32 = 0x7fffffff
10252+ /// @endcond
10253+
10254+ } ur_exp_tensor_map_swizzle_flag_t;
10255+ /// @brief Bit Mask for validating ur_exp_tensor_map_swizzle_flags_t
10256+ #define UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK 0xfffffff0
10257+
10258+ ///////////////////////////////////////////////////////////////////////////////
10259+ /// @brief Tensor map OOB fill
10260+ typedef uint32_t ur_exp_tensor_map_oob_fill_flags_t;
10261+ typedef enum ur_exp_tensor_map_oob_fill_flag_t {
10262+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_NONE = UR_BIT(0), ///< No OOB fill
10263+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_REQUEST_ZERO_FMA = UR_BIT(1), ///< Refer to NVIDIA docs
10264+ /// @cond
10265+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_FORCE_UINT32 = 0x7fffffff
10266+ /// @endcond
10267+
10268+ } ur_exp_tensor_map_oob_fill_flag_t;
10269+ /// @brief Bit Mask for validating ur_exp_tensor_map_oob_fill_flags_t
10270+ #define UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK 0xfffffffc
10271+
10272+ ///////////////////////////////////////////////////////////////////////////////
10273+ /// @brief Encode tensor map with image data
10274+ ///
10275+ /// @details
10276+ /// - Map encode using im2col.
10277+ ///
10278+ /// @returns
10279+ /// - ::UR_RESULT_SUCCESS
10280+ /// - ::UR_RESULT_ERROR_UNINITIALIZED
10281+ /// - ::UR_RESULT_ERROR_DEVICE_LOST
10282+ /// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
10283+ /// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
10284+ /// + `NULL == hDevice`
10285+ /// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
10286+ /// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
10287+ /// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
10288+ /// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
10289+ /// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
10290+ /// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
10291+ /// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
10292+ /// + `NULL == GlobalAddress`
10293+ /// + `NULL == GlobalDim`
10294+ /// + `NULL == GlobalStrides`
10295+ /// + `NULL == PixelBoxLowerCorner`
10296+ /// + `NULL == PixelBoxUpperCorner`
10297+ /// + `NULL == ElementStrides`
10298+ /// + `NULL == hTensorMap`
10299+ /// - ::UR_RESULT_ERROR_INVALID_ARGUMENT
10300+ /// + `TensorRank < 3`
10301+ UR_APIEXPORT ur_result_t UR_APICALL
10302+ urTensorMapEncodeIm2ColExp(
10303+ ur_device_handle_t hDevice, ///< [in] Handle of the device object.
10304+ ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
10305+ uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
10306+ void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
10307+ const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
10308+ ///< the TensorRank dimensions.
10309+ const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
10310+ ///< TensorRank - 1 dimensions.
10311+ const int *PixelBoxLowerCorner, ///< [in] Array containing DHW dimensions of lower box corner.
10312+ const int *PixelBoxUpperCorner, ///< [in] Array containing DHW dimensions of upper box corner.
10313+ uint32_t ChannelsPerPixel, ///< [in] Number of channels per pixel.
10314+ uint32_t PixelsPerColumn, ///< [in] Number of pixels per column.
10315+ const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the TensorRank
10316+ ///< dimensions.
10317+ ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
10318+ ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
10319+ ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
10320+ ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicates whether zero or special NaN constant will be used to
10321+ ///< fill out-of-bounds elements.
10322+ ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
10323+ );
10324+
10325+ ///////////////////////////////////////////////////////////////////////////////
10326+ /// @brief Encode tensor map with tiled data
10327+ ///
10328+ /// @details
10329+ /// - Tiled map encode.
10330+ ///
10331+ /// @returns
10332+ /// - ::UR_RESULT_SUCCESS
10333+ /// - ::UR_RESULT_ERROR_UNINITIALIZED
10334+ /// - ::UR_RESULT_ERROR_DEVICE_LOST
10335+ /// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
10336+ /// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
10337+ /// + `NULL == hDevice`
10338+ /// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
10339+ /// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
10340+ /// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
10341+ /// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
10342+ /// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
10343+ /// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
10344+ /// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
10345+ /// + `NULL == GlobalAddress`
10346+ /// + `NULL == GlobalDim`
10347+ /// + `NULL == GlobalStrides`
10348+ /// + `NULL == BoxDim`
10349+ /// + `NULL == ElementStrides`
10350+ /// + `NULL == hTensorMap`
10351+ /// - ::UR_RESULT_ERROR_INVALID_ARGUMENT
10352+ /// + `TensorRank < 3`
10353+ UR_APIEXPORT ur_result_t UR_APICALL
10354+ urTensorMapEncodeTiledExp(
10355+ ur_device_handle_t hDevice, ///< [in] Handle of the device object.
10356+ ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
10357+ uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
10358+ void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
10359+ const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
10360+ ///< the TensorRank dimensions.
10361+ const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
10362+ ///< TensorRank - 1 dimensions.
10363+ const uint32_t *BoxDim, ///< [in] Array containing traversal box size (number of elments) along
10364+ ///< each of the TensorRank dimensions. Specifies how many elements to be
10365+ ///< traversed along each tensor dimension.
10366+ const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the TensorRank
10367+ ///< dimensions.
10368+ ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
10369+ ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
10370+ ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
10371+ ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicates whether zero or special NaN constant will be used to
10372+ ///< fill out-of-bounds elements.
10373+ ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
10374+ );
10375+
1017310376#if !defined(__GNUC__)
1017410377#pragma endregion
1017510378#endif
@@ -12343,6 +12546,49 @@ typedef struct ur_command_buffer_command_get_info_exp_params_t {
1234312546 size_t **ppPropSizeRet;
1234412547} ur_command_buffer_command_get_info_exp_params_t;
1234512548
12549+ ///////////////////////////////////////////////////////////////////////////////
12550+ /// @brief Function parameters for urTensorMapEncodeIm2ColExp
12551+ /// @details Each entry is a pointer to the parameter passed to the function;
12552+ /// allowing the callback the ability to modify the parameter's value
12553+ typedef struct ur_tensor_map_encode_im_2_col_exp_params_t {
12554+ ur_device_handle_t *phDevice;
12555+ ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
12556+ uint32_t *pTensorRank;
12557+ void **pGlobalAddress;
12558+ const uint64_t **pGlobalDim;
12559+ const uint64_t **pGlobalStrides;
12560+ const int **pPixelBoxLowerCorner;
12561+ const int **pPixelBoxUpperCorner;
12562+ uint32_t *pChannelsPerPixel;
12563+ uint32_t *pPixelsPerColumn;
12564+ const uint32_t **pElementStrides;
12565+ ur_exp_tensor_map_interleave_flags_t *pInterleave;
12566+ ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
12567+ ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
12568+ ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
12569+ ur_exp_tensor_map_handle_t **phTensorMap;
12570+ } ur_tensor_map_encode_im_2_col_exp_params_t;
12571+
12572+ ///////////////////////////////////////////////////////////////////////////////
12573+ /// @brief Function parameters for urTensorMapEncodeTiledExp
12574+ /// @details Each entry is a pointer to the parameter passed to the function;
12575+ /// allowing the callback the ability to modify the parameter's value
12576+ typedef struct ur_tensor_map_encode_tiled_exp_params_t {
12577+ ur_device_handle_t *phDevice;
12578+ ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
12579+ uint32_t *pTensorRank;
12580+ void **pGlobalAddress;
12581+ const uint64_t **pGlobalDim;
12582+ const uint64_t **pGlobalStrides;
12583+ const uint32_t **pBoxDim;
12584+ const uint32_t **pElementStrides;
12585+ ur_exp_tensor_map_interleave_flags_t *pInterleave;
12586+ ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
12587+ ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
12588+ ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
12589+ ur_exp_tensor_map_handle_t **phTensorMap;
12590+ } ur_tensor_map_encode_tiled_exp_params_t;
12591+
1234612592///////////////////////////////////////////////////////////////////////////////
1234712593/// @brief Function parameters for urUsmP2PEnablePeerAccessExp
1234812594/// @details Each entry is a pointer to the parameter passed to the function;
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