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fabiomestrekbenzie
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[CUDA] Implement urMemImageGetInfo
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3 files changed

+115
-21
lines changed

3 files changed

+115
-21
lines changed

source/adapters/cuda/common.hpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,16 @@
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#include <cuda.h>
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#include <ur/ur.hpp>
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/**
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* Call a UR API and, if the result is not UR_RESULT_SUCCESS, automatically
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* return from the current function.
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*/
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#define UR_RETURN_ON_FAILURE(urCall) \
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if (const ur_result_t ur_result_macro = urCall; \
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ur_result_macro != UR_RESULT_SUCCESS) { \
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return ur_result_macro; \
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}
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ur_result_t mapErrorUR(CUresult Result);
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/// Converts CUDA error into UR error codes, and outputs error information

source/adapters/cuda/memory.cpp

Lines changed: 103 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -398,11 +398,109 @@ UR_APIEXPORT ur_result_t UR_APICALL urMemImageCreate(
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return Result;
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}
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/// \TODO Not implemented
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UR_APIEXPORT ur_result_t UR_APICALL urMemImageGetInfo(ur_mem_handle_t,
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ur_image_info_t, size_t,
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void *, size_t *) {
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return UR_RESULT_ERROR_UNSUPPORTED_FEATURE;
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UR_APIEXPORT ur_result_t UR_APICALL urMemImageGetInfo(ur_mem_handle_t hMemory,
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ur_image_info_t propName,
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size_t propSize,
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void *pPropValue,
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size_t *pPropSizeRet) {
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UR_ASSERT(hMemory->isImage(), UR_RESULT_ERROR_INVALID_MEM_OBJECT);
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auto Context = hMemory->getContext();
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ScopedContext Active(Context);
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UrReturnHelper ReturnValue(propSize, pPropValue, pPropSizeRet);
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try {
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CUDA_ARRAY3D_DESCRIPTOR ArrayInfo;
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UR_CHECK_ERROR(cuArray3DGetDescriptor(
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&ArrayInfo, std::get<SurfaceMem>(hMemory->Mem).getArray()));
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const auto cuda2urFormat = [](CUarray_format CUFormat,
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ur_image_channel_type_t *ChannelType) {
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switch (CUFormat) {
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case CU_AD_FORMAT_UNSIGNED_INT8:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8;
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break;
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case CU_AD_FORMAT_UNSIGNED_INT16:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16;
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break;
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case CU_AD_FORMAT_UNSIGNED_INT32:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32;
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break;
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case CU_AD_FORMAT_SIGNED_INT8:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_SIGNED_INT8;
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break;
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case CU_AD_FORMAT_SIGNED_INT16:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_SIGNED_INT16;
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break;
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case CU_AD_FORMAT_SIGNED_INT32:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32;
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break;
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case CU_AD_FORMAT_HALF:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_HALF_FLOAT;
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break;
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case CU_AD_FORMAT_FLOAT:
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*ChannelType = UR_IMAGE_CHANNEL_TYPE_FLOAT;
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break;
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default:
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return UR_RESULT_ERROR_UNSUPPORTED_IMAGE_FORMAT;
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}
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return UR_RESULT_SUCCESS;
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};
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const auto cudaFormatToElementSize = [](CUarray_format CUFormat,
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size_t *Size) {
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switch (CUFormat) {
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case CU_AD_FORMAT_UNSIGNED_INT8:
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case CU_AD_FORMAT_SIGNED_INT8:
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*Size = 1;
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break;
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case CU_AD_FORMAT_UNSIGNED_INT16:
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case CU_AD_FORMAT_SIGNED_INT16:
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case CU_AD_FORMAT_HALF:
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*Size = 2;
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break;
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case CU_AD_FORMAT_UNSIGNED_INT32:
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case CU_AD_FORMAT_SIGNED_INT32:
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case CU_AD_FORMAT_FLOAT:
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*Size = 4;
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break;
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default:
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return UR_RESULT_ERROR_UNSUPPORTED_IMAGE_FORMAT;
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}
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return UR_RESULT_SUCCESS;
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};
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switch (propName) {
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case UR_IMAGE_INFO_FORMAT:
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ur_image_channel_type_t ChannelType;
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UR_RETURN_ON_FAILURE(cuda2urFormat(ArrayInfo.Format, &ChannelType));
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return ReturnValue(
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ur_image_format_t{UR_IMAGE_CHANNEL_ORDER_RGBA, ChannelType});
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case UR_IMAGE_INFO_WIDTH:
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return ReturnValue(ArrayInfo.Width);
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case UR_IMAGE_INFO_HEIGHT:
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return ReturnValue(ArrayInfo.Height);
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case UR_IMAGE_INFO_DEPTH:
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return ReturnValue(ArrayInfo.Depth);
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case UR_IMAGE_INFO_ELEMENT_SIZE:
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size_t Size;
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UR_RETURN_ON_FAILURE(cudaFormatToElementSize(ArrayInfo.Format, &Size));
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return ReturnValue(Size);
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case UR_IMAGE_INFO_ROW_PITCH:
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case UR_IMAGE_INFO_SLICE_PITCH:
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return UR_RESULT_ERROR_UNSUPPORTED_ENUMERATION;
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default:
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return UR_RESULT_ERROR_INVALID_ENUMERATION;
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}
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} catch (ur_result_t Err) {
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return Err;
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} catch (...) {
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return UR_RESULT_ERROR_UNKNOWN;
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}
406504
}
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/// Implements a buffer partition in the CUDA backend.
Lines changed: 2 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,3 @@
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urMemBufferCreateWithNativeHandleTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}_
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{{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_SIZE
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{{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_CONTEXT
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_FORMAT
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ELEMENT_SIZE
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ROW_PITCH
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_SLICE_PITCH
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_WIDTH
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_HEIGHT
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{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_DEPTH
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_FORMAT
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ELEMENT_SIZE
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ROW_PITCH
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_SLICE_PITCH
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_WIDTH
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_HEIGHT
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{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_DEPTH
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urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ROW_PITCH
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urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_SLICE_PITCH

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