@@ -25,29 +25,40 @@ extern "C" {
2525
2626/* Private typedef -----------------------------------------------------------*/
2727/* Private define ------------------------------------------------------------*/
28- #ifdef BSP_SPI_DEBUG
29- #define spi_debug (format, args... ) rt_kprintf(format, ##args)
30- #else
31- #define spi_debug (format, args... )
32- #endif
28+ #ifdef RT_USING_ULOG
29+ # ifdef BSP_SPI_DEBUG
30+ # define LOG_LVL LOG_LVL_DBG
31+ # else
32+ # define LOG_LVL LOG_LVL_INFO
33+ # endif
34+ # define LOG_TAG " SPI"
35+ # include " components/utilities/ulog/ulog.h"
36+ #else /* RT_USING_ULOG */
37+ # define LOG_E rt_kprintf
38+ # ifdef BSP_SPI_DEBUG
39+ # define LOG_D (format, args... ) rt_kprintf(format " \n " , ##args)
40+ # else
41+ # define LOG_D (format, args... )
42+ # endif
43+ #endif /* RT_USING_ULOG */
3344
3445#if CONFIG_USING_SPI0
35- #define SPI0 SPI
46+ # define SPI0 SPI
3647#endif
3748#define SPI_NAME (ch ) " SPI" #ch
3849#define SPI_CTX (idx ) spi_ctx[idx]
3950#define SPI_DEV (ctx ) ((SPIClass *)((ctx)->ldev))
40- #define SPI_START (ctx ) spi_debug( " SPI%d: START\n " , ctx->chn); \
51+ #define SPI_START (ctx ) LOG_D( " [ SPI%d] START" , ctx->chn); \
4152 SPI_DEV (ctx)->beginTransaction(ctx->set)
42- #define SPI_STOP (ctx ) spi_debug( " SPI%d: STOP\n " , ctx->chn); \
53+ #define SPI_STOP (ctx ) LOG_D( " [ SPI%d] STOP" , ctx->chn); \
4354 SPI_DEV (ctx)->endTransaction()
4455#define SPI_TX (ctx, data ) (void )SPI_DEV(ctx)->transfer ((rt_uint8_t )data)
4556#define SPI_RX (ctx ) SPI_DEV(ctx)->transfer (0xff )
4657#define SPI_SET_SPEED (ctx, target ) \
4758if (target != ctx->spd) { \
4859 ctx->set = SPISettings (target, MSBFIRST, SPI_MODE0); \
4960 ctx->spd = target; \
50- spi_debug ( " SPI%d: speed=%d\n " , ctx->chn , target); \
61+ LOG_D ( " [ SPI%d] speed=%d" , ctx->chn , target); \
5162}
5263
5364/* Private variables ---------------------------------------------------------*/
@@ -62,7 +73,7 @@ static rt_bool_t wait_idle(struct bsp_spi_contex *ctx) {
6273 if (0xff == SPI_RX (ctx)) break ;
6374 }
6475
65- spi_debug ( " SPI%d: wait %d\n " , ctx->chn , i);
76+ LOG_D ( " [ SPI%d] wait %d" , ctx->chn , i);
6677 return (i < SPI_DEFAULT_LIMIT);
6778}
6879
@@ -73,7 +84,7 @@ static rt_bool_t wait_token(struct bsp_spi_contex *ctx, rt_uint8_t token) {
7384 if (token == SPI_RX (ctx)) break ;
7485 }
7586
76- spi_debug ( " SPI%d: wait token %d\n " , ctx->chn , i);
87+ LOG_D ( " [ SPI%d] wait token %d" , ctx->chn , i);
7788 return (i < SPI_DEFAULT_LIMIT);
7889}
7990
@@ -86,11 +97,11 @@ static rt_err_t bsp_spi_open(rt_device_t dev, rt_uint16_t oflag) {
8697 if (RT_EOK != ret) break ;
8798
8899 ctx->dev .open_flag = oflag & RT_DEVICE_OFLAG_MASK;
89- spi_debug ( " SPI%d: open with flag %x\n " , ctx->chn , oflag);
100+ LOG_D ( " [ SPI%d] open with flag %x" , ctx->chn , oflag);
90101 } while (0 );
91102
92103 if (RT_EOK != ret) {
93- spi_debug ( " SPI%d err: open failed [%08x]\n " , ctx->chn , ret);
104+ LOG_D ( " [ SPI%d E] open failed [%08x]" , ctx->chn , ret);
94105 }
95106 return ret;
96107}
@@ -103,11 +114,11 @@ static rt_err_t bsp_spi_close(rt_device_t dev) {
103114 ret = rt_mutex_release (&ctx->lok );
104115 if (RT_EOK != ret) break ;
105116
106- spi_debug ( " SPI%d: closed\n " , ctx->chn );
117+ LOG_D ( " [ SPI%d] closed" , ctx->chn );
107118 } while (0 );
108119
109120 if (RT_EOK != ret) {
110- spi_debug ( " SPI%d err: close failed [%08x]\n " , ctx->chn , ret);
121+ LOG_D ( " [ SPI%d E] close failed [%08x]" , ctx->chn , ret);
111122 }
112123 return ret;
113124}
@@ -134,7 +145,7 @@ static rt_size_t bsp_spi_read(rt_device_t dev, rt_off_t token, void *buf,
134145
135146 if (RT_NULL == buf) {
136147 /* dummy read */
137- spi_debug ( " SPI%d: dummy read [%d]\n " , ctx->chn , size);
148+ LOG_D ( " [ SPI%d] dummy read [%d]" , ctx->chn , size);
138149 SPI_START (ctx);
139150 for (i = 0 ; i < size; i++) (void )SPI_RX (ctx);
140151 SPI_STOP (ctx);
@@ -161,24 +172,24 @@ static rt_size_t bsp_spi_read(rt_device_t dev, rt_off_t token, void *buf,
161172 if (i >= SPI_DEFAULT_RETRY) {
162173 SPI_STOP (ctx);
163174 err = -RT_EBUSY;
164- spi_debug ( " SPI%d err: read busy\n " , ctx->chn );
175+ LOG_D ( " [ SPI%d E] read busy" , ctx->chn );
165176 break ;
166177 }
167178
168179 /* send instruction */
169- spi_debug ( " SPI%d: tx ins [%d]\n " , ctx->chn , inst_len);
180+ LOG_D ( " [ SPI%d] tx ins [%d]" , ctx->chn , inst_len);
170181 for (i = 0 ; i < inst_len; i++)
171182 SPI_TX (ctx, *(inst_ptr + i));
172183
173184 /* receive data */
174- spi_debug ( " SPI%d: rx data [%d]\n " , ctx->chn , size);
185+ LOG_D ( " [ SPI%d] rx data [%d]" , ctx->chn , size);
175186 if (0 != token) {
176187 for (i = 0 ; i < SPI_DEFAULT_RETRY; i++)
177188 if (wait_token (ctx, (rt_uint8_t )token)) break ;
178189 if (i >= SPI_DEFAULT_RETRY) {
179190 SPI_STOP (ctx);
180191 err = -RT_EIO;
181- spi_debug ( " SPI%d err: no token\n " , ctx->chn );
192+ LOG_D ( " [ SPI%d E] no token" , ctx->chn );
182193 break ;
183194 }
184195 }
@@ -237,17 +248,17 @@ static rt_size_t bsp_spi_write(rt_device_t dev, rt_off_t pos, const void *buf,
237248 if (i >= SPI_DEFAULT_RETRY) {
238249 SPI_STOP (ctx);
239250 err = -RT_EBUSY;
240- spi_debug ( " SPI%d err: write busy\n " , ctx->chn );
251+ LOG_D ( " [ SPI%d E] write busy" , ctx->chn );
241252 break ;
242253 }
243254
244255 /* send instruction */
245- spi_debug ( " SPI%d: tx ins [%d]\n " , ctx->chn , inst_len);
256+ LOG_D ( " [ SPI%d] tx ins [%d]" , ctx->chn , inst_len);
246257 for (i = 0 ; i < inst_len; i++)
247258 SPI_TX (ctx, *(inst_ptr + i));
248259
249260 /* send data */
250- spi_debug ( " SPI%d: tx data [%d]\n " , ctx->chn , size);
261+ LOG_D ( " [ SPI%d] tx data [%d]" , ctx->chn , size);
251262 for (i = 0 ; i < size; i++)
252263 SPI_TX (ctx, *(tx_buf + i));
253264 SPI_STOP (ctx);
@@ -382,11 +393,11 @@ rt_err_t bsp_hw_spi_init(void) {
382393 if (RT_EOK != ret) break ;
383394
384395 SPI_DEV (&SPI_CTX (i))->begin ();
385- spi_debug ( " SPI%d: h/w init ok!\n " , chn);
396+ LOG_D ( " [ SPI%d] h/w init ok!" , chn);
386397 }
387398
388399 if (RT_EOK != ret)
389- rt_kprintf ( " SPI%d err: h/w init failed!\n " , chn);
400+ LOG_E ( " [ SPI%d E] h/w init failed!" , chn);
390401
391402 return ret;
392403}
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