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5 | 5 | ;; name in dgo: dma-h |
6 | 6 | ;; dgos: GAME |
7 | 7 |
|
| 8 | +(defenum dma-tag-id |
| 9 | + :bitfield #f |
| 10 | + :type uint8 |
| 11 | + (refe 0) ;; addr=ADDR, ends after this transfer |
| 12 | + (cnt 1) ;; addr=after tag, next-tag=after data |
| 13 | + (next 2) ;; addr=after tag, next-tag=ADDR |
| 14 | + (ref 3) ;; addr=ADDR, next-tag=after tag |
| 15 | + (refs 4) ;; ref, but stall controled |
| 16 | + (call 5) ;; |
| 17 | + (ret 6) ;; |
| 18 | + (end 7) ;; next, but ends. |
| 19 | + ) |
| 20 | + |
| 21 | +;; all these have mask (only applies to unpacks) and interrupt not set. |
| 22 | +(defenum vif-cmd |
| 23 | + :bitfield #f |
| 24 | + :type uint8 |
| 25 | + (nop 0) ;; no-op, can still have irq set. |
| 26 | + (stcycl 1) ;; set write recycle register |
| 27 | + (offset 2) ;; set offset register |
| 28 | + (base 3) ;; set base register |
| 29 | + (itop 4) ;; set data pointer register (itops) |
| 30 | + (stmod 5) ;; set mode register |
| 31 | + (mskpath3 6) ;; set path 3 mask |
| 32 | + (mark 7) ;; set mark register |
| 33 | + (pc-port 8) ;; special tag for PC Port data. |
| 34 | + (flushe 16) ;; wait for end of microprogram |
| 35 | + (flush 17) ;; wait for end of microprogram and transfer (path1/path2) |
| 36 | + (flusha 19) ;; wait for end of microprogram and transfer (path1/path2/path3) |
| 37 | + (mscal 20) ;; activate microprogram (call) |
| 38 | + (mscalf 21) ;; flushe and activate (call) |
| 39 | + (mscnt 23) ;; activate microprogram (continue) |
| 40 | + (stmask 32) ;; set MASK register. |
| 41 | + (strow 48) ;; set filling data |
| 42 | + (stcol 49) ;; set filling data |
| 43 | + (mpg 74) ;; transfer microprogram |
| 44 | + (direct 80) ;; straight to GIF. |
| 45 | + (directhl 81) |
| 46 | + (unpack-s-32 96) |
| 47 | + (unpack-s-16 97) |
| 48 | + (unpack-s-8 98) |
| 49 | + ;; 99 is invllid |
| 50 | + (unpack-v2-32 100) |
| 51 | + (unpack-v2-16 101) |
| 52 | + (unpack-v2-8 102) |
| 53 | + ;; 103 is invalid |
| 54 | + (unpack-v3-32 104) |
| 55 | + (unpack-v3-16 105) |
| 56 | + (unpack-v3-8 106) |
| 57 | + ;; 107 is invalid |
| 58 | + (unpack-v4-32 108) |
| 59 | + (unpack-v4-16 109) |
| 60 | + (unpack-v4-8 110) |
| 61 | + (unpack-v4-5 111) |
| 62 | + (cmd-mask 239) ;; not sure what this is. |
| 63 | + ) |
| 64 | + |
| 65 | +;; this makes a copy of the above type, but uses a uint32. |
| 66 | +(defenum vif-cmd-32 |
| 67 | + :bitfield #f |
| 68 | + :type uint32 |
| 69 | + :copy-entries vif-cmd |
| 70 | + ) |
| 71 | + |
8 | 72 | ;; DECOMP BEGINS |
9 | 73 |
|
| 74 | +(deftype dma-chcr (uint32) |
| 75 | + "Memory mapped DMA channel control register. Typically used to start and check on DMA transfer." |
| 76 | + ((dir uint8 :offset 0 :size 1) |
| 77 | + (mod uint8 :offset 2 :size 2) |
| 78 | + (asp uint8 :offset 4 :size 2) |
| 79 | + (tte uint8 :offset 6 :size 1) |
| 80 | + (tie uint8 :offset 7 :size 1) |
| 81 | + (str uint8 :offset 8 :size 1) |
| 82 | + (tag uint16 :offset 16 :size 16) |
| 83 | + ) |
| 84 | + ) |
| 85 | + |
| 86 | + |
| 87 | +(deftype dma-bank (structure) |
| 88 | + "Bank of memory mapped DMA registers for a single channel. Used to control DMA." |
| 89 | + ((chcr dma-chcr :offset 0) |
| 90 | + (madr uint32 :offset 16) |
| 91 | + (qwc uint32 :offset 32) |
| 92 | + ) |
| 93 | + ) |
| 94 | + |
| 95 | + |
| 96 | +(deftype dma-bank-source (dma-bank) |
| 97 | + "DMA channel registers for a DMA channel supporting source-chain." |
| 98 | + ((tadr uint32 :offset 48) |
| 99 | + ) |
| 100 | + ) |
| 101 | + |
| 102 | + |
| 103 | +(deftype dma-bank-vif (dma-bank-source) |
| 104 | + "DMA channel registers for a DMA channel with call/ret stack." |
| 105 | + ((as0 uint32 :offset 64) |
| 106 | + (as1 uint32 :offset 80) |
| 107 | + ) |
| 108 | + ) |
| 109 | + |
| 110 | + |
| 111 | +(deftype dma-bank-spr (dma-bank-source) |
| 112 | + "DMA channel registers for a DMA channel supporting scratchpad transfer." |
| 113 | + ((sadr uint32 :offset 128) |
| 114 | + ) |
| 115 | + ) |
| 116 | + |
| 117 | + |
| 118 | +(deftype dma-ctrl (uint32) |
| 119 | + "Main DMA control register, shared for all channels." |
| 120 | + ((dmae uint8 :offset 0 :size 1) |
| 121 | + (rele uint8 :offset 1 :size 1) |
| 122 | + (mfd uint8 :offset 2 :size 2) |
| 123 | + (sts uint8 :offset 4 :size 2) |
| 124 | + (std uint8 :offset 6 :size 2) |
| 125 | + (rcyc uint8 :offset 8 :size 3) |
| 126 | + ) |
| 127 | + ) |
| 128 | + |
| 129 | +(deftype dma-enable (uint32) |
| 130 | + ((cpnd uint8 :offset 16 :size 1) |
| 131 | + ) |
| 132 | + ) |
| 133 | + |
| 134 | +(deftype dma-sqwc (uint32) |
| 135 | + ((sqwc uint8 :offset 0 :size 8) |
| 136 | + (tqwc uint8 :offset 16 :size 8) |
| 137 | + ) |
| 138 | + ) |
| 139 | + |
| 140 | +(deftype dma-bank-control (structure) |
| 141 | + "Memory mapping for shared DMA registers." |
| 142 | + ((ctrl dma-ctrl :offset 0) |
| 143 | + (stat uint32 :offset 16) |
| 144 | + (pcr uint32 :offset 32) |
| 145 | + (sqwc dma-sqwc :offset 48) |
| 146 | + (rbsr uint32 :offset 64) |
| 147 | + (rbor uint32 :offset 80) |
| 148 | + (stadr uint32 :offset 96) |
| 149 | + (enabler uint32 :offset 5408) |
| 150 | + (enablew uint32 :offset 5520) |
| 151 | + ) |
| 152 | + ) |
| 153 | + |
| 154 | + |
| 155 | +(deftype vu-code-block (basic) |
| 156 | + "Unused type for some VU code. vu-function is used instead." |
| 157 | + ((name basic) |
| 158 | + (code uint32) |
| 159 | + (size int32) |
| 160 | + (dest-address uint32) |
| 161 | + ) |
| 162 | + ) |
| 163 | + |
| 164 | + |
| 165 | +(deftype vu-stat (uint64) |
| 166 | + () |
| 167 | + ) |
| 168 | + |
| 169 | +(deftype dma-tag (uint64) |
| 170 | + "The 64-bit tag used by the DMA system." |
| 171 | + ((qwc uint16 :offset 0 :size 16) |
| 172 | + (pce uint8 :offset 26 :size 2) |
| 173 | + (id dma-tag-id :offset 28 :size 3) |
| 174 | + (irq uint8 :offset 31 :size 1) |
| 175 | + (addr uint32 :offset 32 :size 31) |
| 176 | + (spr uint8 :offset 63 :size 1) |
| 177 | + ) |
| 178 | + ) |
| 179 | + |
| 180 | + |
| 181 | +(deftype dma-bucket (structure) |
| 182 | + "A linked list of DMA data, typically all in the same category. Used to organize the full DMA chain." |
| 183 | + ((tag dma-tag) |
| 184 | + (last (pointer dma-tag)) |
| 185 | + (dummy uint32) |
| 186 | + (next uint32 :offset 4) |
| 187 | + (clear uint64 :overlay-at last) |
| 188 | + (vif0 uint32 :overlay-at last) |
| 189 | + (vif1 uint32 :overlay-at dummy) |
| 190 | + ) |
| 191 | + ) |
| 192 | + |
| 193 | + |
| 194 | +(deftype vif-mask (uint32) |
| 195 | + ((m0 uint8 :offset 0 :size 2) |
| 196 | + (m1 uint8 :offset 2 :size 2) |
| 197 | + (m2 uint8 :offset 4 :size 2) |
| 198 | + (m3 uint8 :offset 6 :size 2) |
| 199 | + (m4 uint8 :offset 8 :size 2) |
| 200 | + (m5 uint8 :offset 10 :size 2) |
| 201 | + (m6 uint8 :offset 12 :size 2) |
| 202 | + (m7 uint8 :offset 14 :size 2) |
| 203 | + (m8 uint8 :offset 16 :size 2) |
| 204 | + (m9 uint8 :offset 18 :size 2) |
| 205 | + (m10 uint8 :offset 20 :size 2) |
| 206 | + (m11 uint8 :offset 22 :size 2) |
| 207 | + (m12 uint8 :offset 24 :size 2) |
| 208 | + (m13 uint8 :offset 26 :size 2) |
| 209 | + (m14 uint8 :offset 28 :size 2) |
| 210 | + (m15 uint8 :offset 30 :size 2) |
| 211 | + ) |
| 212 | + ) |
| 213 | + |
| 214 | +(deftype vif-stcycl-imm (uint16) |
| 215 | + "The imm field of a VIF code using STCYCL, which adjusts the pattern for storing data." |
| 216 | + ((cl uint8 :offset 0 :size 8) |
| 217 | + (wl uint8 :offset 8 :size 8) |
| 218 | + ) |
| 219 | + ) |
| 220 | + |
| 221 | +(deftype vif-unpack-imm (uint16) |
| 222 | + "The imm field of a VIF code using UNPACK, which transfers data to VU memory." |
| 223 | + ((addr uint16 :offset 0 :size 10) |
| 224 | + (usn uint8 :offset 14 :size 1) |
| 225 | + (flg uint8 :offset 15 :size 1) |
| 226 | + ) |
| 227 | + ) |
| 228 | + |
| 229 | +(deftype vif-tag (uint32) |
| 230 | + "A tag consumed by the VIF, which accepts DMA data." |
| 231 | + ((imm uint16 :offset 0 :size 16) |
| 232 | + (num uint8 :offset 16 :size 8) |
| 233 | + (cmd vif-cmd :offset 24 :size 7) |
| 234 | + (irq uint8 :offset 31 :size 1) |
| 235 | + (msk uint8 :offset 28 :size 1) |
| 236 | + ) |
| 237 | + ) |
| 238 | + |
| 239 | + |
| 240 | +;; ERROR: function was not converted to expressions. Cannot decompile. |
| 241 | + |
| 242 | +;; ERROR: function was not converted to expressions. Cannot decompile. |
| 243 | + |
| 244 | +;; ERROR: function was not converted to expressions. Cannot decompile. |
| 245 | + |
| 246 | +;; ERROR: function was not converted to expressions. Cannot decompile. |
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