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Remove infrastructure for non-inline assembly
As of ebce88b, we no longer have any non-inline assembly code in Open MPI. This patch removes the configure infrastructure to support non-inline assembly. Since the only assembly style supported is GCC inline assembly, remove a bunch of constant checks in the atomics and timing code around GCC inline assembly. Those headers won't be included unless GCC inline assembly is supported. Finally, be consistent in what constant we are checking for GCC inline assembly support and add a missing check in the ARM64 timer code. Signed-off-by: Brian Barrett <[email protected]>
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14 files changed

+171
-901
lines changed

14 files changed

+171
-901
lines changed

‎config/opal_config_asm.m4

Lines changed: 4 additions & 541 deletions
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‎opal/include/opal/sys/architecture.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
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* Copyright (c) 2017 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
1818
* Copyright (c) 2020 Google, LLC. All rights reserved.
19+
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
20+
* All Rights reserved.
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* $COPYRIGHT$
2022
*
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* Additional copyrights may follow
@@ -42,7 +44,4 @@
4244
#define OPAL_BUILTIN_NO 0203
4345
#define OPAL_BUILTIN_C11 0204
4446

45-
/* Formats */
46-
#define OPAL_DEFAULT 1000 /* standard for given architecture */
47-
4847
#endif /* #ifndef OPAL_SYS_ARCHITECTURE_H */

‎opal/include/opal/sys/arm64/atomic.h

Lines changed: 41 additions & 44 deletions
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@@ -16,6 +16,8 @@
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* reserved.
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* Copyright (c) 2021 Triad National Security, LLC. All rights reserved.
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* Copyright (c) 2021 Google, LLC. All rights reserved.
19+
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
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* All Rights reserved.
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* $COPYRIGHT$
2022
*
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* Additional copyrights may follow
@@ -25,31 +27,28 @@
2527

2628
#include "atomic_llsc.h"
2729

28-
#if !defined(OPAL_SYS_ARCH_ATOMIC_H)
29-
30-
# define OPAL_SYS_ARCH_ATOMIC_H 1
31-
32-
# if OPAL_GCC_INLINE_ASSEMBLY
33-
34-
# define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
35-
# define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
36-
# define OPAL_HAVE_ATOMIC_SWAP_32 1
37-
# define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
38-
# define OPAL_HAVE_ATOMIC_SWAP_64 1
39-
# define OPAL_HAVE_ATOMIC_ADD_32 1
40-
# define OPAL_HAVE_ATOMIC_AND_32 1
41-
# define OPAL_HAVE_ATOMIC_OR_32 1
42-
# define OPAL_HAVE_ATOMIC_XOR_32 1
43-
# define OPAL_HAVE_ATOMIC_SUB_32 1
44-
# define OPAL_HAVE_ATOMIC_ADD_64 1
45-
# define OPAL_HAVE_ATOMIC_AND_64 1
46-
# define OPAL_HAVE_ATOMIC_OR_64 1
47-
# define OPAL_HAVE_ATOMIC_XOR_64 1
48-
# define OPAL_HAVE_ATOMIC_SUB_64 1
49-
50-
# define MB() __asm__ __volatile__("dmb sy" : : : "memory")
51-
# define RMB() __asm__ __volatile__("dmb ld" : : : "memory")
52-
# define WMB() __asm__ __volatile__("dmb st" : : : "memory")
30+
#ifndef OPAL_SYS_ARCH_ATOMIC_H
31+
#define OPAL_SYS_ARCH_ATOMIC_H 1
32+
33+
#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
34+
#define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
35+
#define OPAL_HAVE_ATOMIC_SWAP_32 1
36+
#define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
37+
#define OPAL_HAVE_ATOMIC_SWAP_64 1
38+
#define OPAL_HAVE_ATOMIC_ADD_32 1
39+
#define OPAL_HAVE_ATOMIC_AND_32 1
40+
#define OPAL_HAVE_ATOMIC_OR_32 1
41+
#define OPAL_HAVE_ATOMIC_XOR_32 1
42+
#define OPAL_HAVE_ATOMIC_SUB_32 1
43+
#define OPAL_HAVE_ATOMIC_ADD_64 1
44+
#define OPAL_HAVE_ATOMIC_AND_64 1
45+
#define OPAL_HAVE_ATOMIC_OR_64 1
46+
#define OPAL_HAVE_ATOMIC_XOR_64 1
47+
#define OPAL_HAVE_ATOMIC_SUB_64 1
48+
49+
#define MB() __asm__ __volatile__("dmb sy" : : : "memory")
50+
#define RMB() __asm__ __volatile__("dmb ld" : : : "memory")
51+
#define WMB() __asm__ __volatile__("dmb st" : : : "memory")
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5453
/**********************************************************************
5554
*
@@ -251,23 +250,23 @@ static inline bool opal_atomic_compare_exchange_strong_rel_64(opal_atomic_int64_
251250
return ret;
252251
}
253252

254-
# define OPAL_ASM_MAKE_ATOMIC(type, bits, name, inst, reg) \
255-
static inline type opal_atomic_fetch_##name##_##bits(opal_atomic_##type *addr, \
256-
type value) \
257-
{ \
258-
type newval, old; \
259-
int32_t tmp; \
260-
\
261-
__asm__ __volatile__("1: ldxr %" reg "1, [%3] \n" \
262-
" " inst " %" reg "0, %" reg "1, %" reg "4 \n" \
263-
" stxr %w2, %" reg "0, [%3] \n" \
264-
" cbnz %w2, 1b \n" \
265-
: "=&r"(newval), "=&r"(old), "=&r"(tmp) \
266-
: "r"(addr), "r"(value) \
267-
: "cc", "memory"); \
268-
\
269-
return old; \
270-
}
253+
#define OPAL_ASM_MAKE_ATOMIC(type, bits, name, inst, reg) \
254+
static inline type opal_atomic_fetch_##name##_##bits(opal_atomic_##type *addr, \
255+
type value) \
256+
{ \
257+
type newval, old; \
258+
int32_t tmp; \
259+
\
260+
__asm__ __volatile__("1: ldxr %" reg "1, [%3] \n" \
261+
" " inst " %" reg "0, %" reg "1, %" reg "4 \n" \
262+
" stxr %w2, %" reg "0, [%3] \n" \
263+
" cbnz %w2, 1b \n" \
264+
: "=&r"(newval), "=&r"(old), "=&r"(tmp) \
265+
: "r"(addr), "r"(value) \
266+
: "cc", "memory"); \
267+
\
268+
return old; \
269+
}
271270

272271
OPAL_ASM_MAKE_ATOMIC(int32_t, 32, add, "add", "w")
273272
OPAL_ASM_MAKE_ATOMIC(int32_t, 32, and, "and", "w")
@@ -280,6 +279,4 @@ OPAL_ASM_MAKE_ATOMIC(int64_t, 64, or, "orr", "")
280279
OPAL_ASM_MAKE_ATOMIC(int64_t, 64, xor, "eor", "")
281280
OPAL_ASM_MAKE_ATOMIC(int64_t, 64, sub, "sub", "")
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283-
# endif /* OPAL_GCC_INLINE_ASSEMBLY */
284-
285282
#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */

‎opal/include/opal/sys/arm64/atomic_llsc.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
1616
* reserved.
1717
* Copyright (c) 2021 Triad National Security, LLC. All rights reserved.
1818
* Copyright (c) 2021 Google, LLC. All rights reserved.
19+
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
20+
* All Rights reserved.
1921
* $COPYRIGHT$
2022
*
2123
* Additional copyrights may follow
@@ -77,6 +79,6 @@
7779
ret = (_ret == 0); \
7880
} while (0)
7981

80-
# endif /* OPAL_GCC_INLINE_ASSEMBLY */
82+
# endif /* OPAL_C_GCC_INLINE_ASSEMBLY */
8183

8284
#endif /* ! OPAL_SYS_ARCH_ATOMIC_LLSC_H */

‎opal/include/opal/sys/arm64/timer.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,8 @@
77
* Copyright (c) 2016 Los Alamos National Security, LLC. All rights
88
* reserved.
99
* Copyright (c) 2021 Google, LLC. All rights reserved.
10+
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
11+
* All Rights reserved.
1012
* $COPYRIGHT$
1113
*
1214
* Additional copyrights may follow
@@ -23,6 +25,8 @@ typedef uint64_t opal_timer_t;
2325
typedef uint32_t opal_timer_t;
2426
#endif
2527

28+
#if OPAL_C_GCC_INLINE_ASSEMBLY
29+
2630
static inline opal_timer_t opal_sys_timer_get_cycles(void)
2731
{
2832
opal_timer_t ret;
@@ -51,4 +55,6 @@ static inline opal_timer_t opal_sys_timer_get_freq(void)
5155
#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
5256
#define OPAL_HAVE_SYS_TIMER_GET_FREQ 1
5357

58+
#endif /* OPAL_C_GCC_INLINE_ASSEMBLY */
59+
5460
#endif /* ! OPAL_SYS_ARCH_TIMER_H */

‎opal/include/opal/sys/arm64/update.sh

Lines changed: 0 additions & 36 deletions
This file was deleted.

‎opal/include/opal/sys/atomic.h

Lines changed: 17 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,8 @@
1717
* Copyright (c) 2017 Research Organization for Information Science
1818
* and Technology (RIST). All rights reserved.
1919
* Copyright (c) 2020-2021 Google, LLC. All rights reserved.
20+
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
21+
* All Rights reserved.
2022
* $COPYRIGHT$
2123
*
2224
* Additional copyrights may follow
@@ -57,28 +59,12 @@
5759
#include "opal/sys/architecture.h"
5860
#include "opal_stdatomic.h"
5961

60-
/* do some quick #define cleanup in cases where we are doing
61-
testing... */
62-
#ifdef OPAL_DISABLE_INLINE_ASM
63-
# undef OPAL_C_GCC_INLINE_ASSEMBLY
64-
# define OPAL_C_GCC_INLINE_ASSEMBLY 0
65-
#endif
66-
6762
#if OPAL_ASSEMBLY_BUILTIN == OPAL_BUILTIN_C11 && !defined(__INTEL_COMPILER)
6863

6964
# include "atomic_stdc.h"
7065

7166
#else /* !OPAL_C_HAVE__ATOMIC */
7267

73-
/* define OPAL_{GCC,DEC,XLC}_INLINE_ASSEMBLY based on the
74-
OPAL_C_{GCC,DEC,XLC}_INLINE_ASSEMBLY defines and whether we
75-
are in C or C++ */
76-
# if defined(c_plusplus) || defined(__cplusplus)
77-
/* We no longer support inline assembly for C++ as OPAL is a C-only interface */
78-
# define OPAL_GCC_INLINE_ASSEMBLY 0
79-
# else
80-
# define OPAL_GCC_INLINE_ASSEMBLY OPAL_C_GCC_INLINE_ASSEMBLY
81-
# endif
8268

8369
BEGIN_C_DECLS
8470
/**********************************************************************
@@ -109,39 +95,21 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
10995
* files if we need to specify them as inline or non-inline
11096
*
11197
*********************************************************************/
112-
# if !OPAL_GCC_INLINE_ASSEMBLY
113-
# define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER 0
114-
# define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_32 0
115-
# define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_64 0
116-
# define OPAL_HAVE_INLINE_ATOMIC_ADD_32 0
117-
# define OPAL_HAVE_INLINE_ATOMIC_AND_32 0
118-
# define OPAL_HAVE_INLINE_ATOMIC_OR_32 0
119-
# define OPAL_HAVE_INLINE_ATOMIC_XOR_32 0
120-
# define OPAL_HAVE_INLINE_ATOMIC_SUB_32 0
121-
# define OPAL_HAVE_INLINE_ATOMIC_ADD_64 0
122-
# define OPAL_HAVE_INLINE_ATOMIC_AND_64 0
123-
# define OPAL_HAVE_INLINE_ATOMIC_OR_64 0
124-
# define OPAL_HAVE_INLINE_ATOMIC_XOR_64 0
125-
# define OPAL_HAVE_INLINE_ATOMIC_SUB_64 0
126-
# define OPAL_HAVE_INLINE_ATOMIC_SWAP_32 0
127-
# define OPAL_HAVE_INLINE_ATOMIC_SWAP_64 0
128-
# else
129-
# define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER 1
130-
# define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_32 1
131-
# define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_64 1
132-
# define OPAL_HAVE_INLINE_ATOMIC_ADD_32 1
133-
# define OPAL_HAVE_INLINE_ATOMIC_AND_32 1
134-
# define OPAL_HAVE_INLINE_ATOMIC_OR_32 1
135-
# define OPAL_HAVE_INLINE_ATOMIC_XOR_32 1
136-
# define OPAL_HAVE_INLINE_ATOMIC_SUB_32 1
137-
# define OPAL_HAVE_INLINE_ATOMIC_ADD_64 1
138-
# define OPAL_HAVE_INLINE_ATOMIC_AND_64 1
139-
# define OPAL_HAVE_INLINE_ATOMIC_OR_64 1
140-
# define OPAL_HAVE_INLINE_ATOMIC_XOR_64 1
141-
# define OPAL_HAVE_INLINE_ATOMIC_SUB_64 1
142-
# define OPAL_HAVE_INLINE_ATOMIC_SWAP_32 1
143-
# define OPAL_HAVE_INLINE_ATOMIC_SWAP_64 1
144-
# endif
98+
#define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER 1
99+
#define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_32 1
100+
#define OPAL_HAVE_INLINE_ATOMIC_COMPARE_EXCHANGE_64 1
101+
#define OPAL_HAVE_INLINE_ATOMIC_ADD_32 1
102+
#define OPAL_HAVE_INLINE_ATOMIC_AND_32 1
103+
#define OPAL_HAVE_INLINE_ATOMIC_OR_32 1
104+
#define OPAL_HAVE_INLINE_ATOMIC_XOR_32 1
105+
#define OPAL_HAVE_INLINE_ATOMIC_SUB_32 1
106+
#define OPAL_HAVE_INLINE_ATOMIC_ADD_64 1
107+
#define OPAL_HAVE_INLINE_ATOMIC_AND_64 1
108+
#define OPAL_HAVE_INLINE_ATOMIC_OR_64 1
109+
#define OPAL_HAVE_INLINE_ATOMIC_XOR_64 1
110+
#define OPAL_HAVE_INLINE_ATOMIC_SUB_64 1
111+
#define OPAL_HAVE_INLINE_ATOMIC_SWAP_32 1
112+
#define OPAL_HAVE_INLINE_ATOMIC_SWAP_64 1
145113

146114
/**
147115
* Enumeration of lock states

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