@@ -276,7 +276,7 @@ void ompi_spc_events_init(void)
276276 */ 
277277void  ompi_spc_init (void )
278278{
279-     int  i , j , ret , found  =  0 , all_on  =  0 ;
279+     int  i , j , ret , found  =  0 , all_on  =  0 ,  matched   =   0 ;
280280
281281    /* Initialize the clock frequency variable as the CPU's frequency in MHz */ 
282282    sys_clock_freq_mhz  =  opal_timer_base_get_freq () / 1000000 ;
@@ -287,6 +287,14 @@ void ompi_spc_init(void)
287287    char  * * arg_strings  =  opal_argv_split (ompi_mpi_spc_attach_string , ',' );
288288    int  num_args        =  opal_argv_count (arg_strings );
289289
290+     /* Reset all timer-based counters */ 
291+     for (i  =  0 ; i  <  OMPI_SPC_NUM_COUNTERS ; i ++ ) {
292+         CLEAR_SPC_BIT (ompi_spc_timer_event , i );
293+     }
294+ 
295+     /* If this is a timer event, set the corresponding timer_event entry */ 
296+     SET_SPC_BIT (ompi_spc_timer_event , OMPI_SPC_MATCH_TIME );
297+ 
290298    /* If there is only one argument and it is 'all', then all counters 
291299     * should be turned on.  If the size is 0, then no counters will be enabled. 
292300     */ 
@@ -299,49 +307,44 @@ void ompi_spc_init(void)
299307    /* Turn on only the counters that were specified in the MCA parameter */ 
300308    for (i  =  0 ; i  <  OMPI_SPC_NUM_COUNTERS ; i ++ ) {
301309        if (all_on ) {
302-             SET_SPC_BIT (ompi_spc_attached_event , i );
303-             mpi_t_enabled  =  true;
304310            found ++ ;
305311        } else  {
312+             matched  =  0 ;
306313            /* Note: If no arguments were given, this will be skipped */ 
307314            for (j  =  0 ; j  <  num_args ; j ++ ) {
308315                if ( 0  ==  strcmp (ompi_spc_events_names [i ].counter_name , arg_strings [j ]) ) {
309-                     SET_SPC_BIT (ompi_spc_attached_event , i );
310-                     mpi_t_enabled  =  true;
311316                    found ++ ;
317+                     matched  =  1 ;
312318                    break ;
313319                }
314320            }
315321        }
316322
317-         /* ######################################################################## 
318-          * ################## Add Timer-Based Counter Enums Here ################## 
319-          * ######################################################################## 
320-          */ 
321-         CLEAR_SPC_BIT (ompi_spc_timer_event , i );
322- 
323-         /* Registers the current counter as an MPI_T pvar regardless of whether it's been turned on or not */ 
324-         ret  =  mca_base_pvar_register ("ompi" , "runtime" , "spc" , ompi_spc_events_names [i ].counter_name , ompi_spc_events_names [i ].counter_description ,
325-                                      OPAL_INFO_LVL_4 , MPI_T_PVAR_CLASS_SIZE ,
326-                                      MCA_BASE_VAR_TYPE_UNSIGNED_LONG_LONG , NULL , MPI_T_BIND_NO_OBJECT ,
327-                                      MCA_BASE_PVAR_FLAG_READONLY  | MCA_BASE_PVAR_FLAG_CONTINUOUS ,
328-                                      ompi_spc_get_count , NULL , ompi_spc_notify , NULL );
323+         if  (all_on  ||  matched ) {
324+             SET_SPC_BIT (ompi_spc_attached_event , i );
325+             mpi_t_enabled  =  true;
329326
330-         /* Check to make sure that ret is a valid index and not an error code. 
331-          */ 
332-         if ( ret  >= 0  ) {
333-             if ( mpi_t_offset  ==  -1  ) {
334-                 mpi_t_offset  =  ret ;
327+             /* Registers the current counter as an MPI_T pvar regardless of whether it's been turned on or not */ 
328+             ret  =  mca_base_pvar_register ("ompi" , "runtime" , "spc" , ompi_spc_events_names [i ].counter_name , ompi_spc_events_names [i ].counter_description ,
329+                                          OPAL_INFO_LVL_4 , MPI_T_PVAR_CLASS_SIZE ,
330+                                          MCA_BASE_VAR_TYPE_UNSIGNED_LONG_LONG , NULL , MPI_T_BIND_NO_OBJECT ,
331+                                          MCA_BASE_PVAR_FLAG_READONLY  | MCA_BASE_PVAR_FLAG_CONTINUOUS ,
332+                                          ompi_spc_get_count , NULL , ompi_spc_notify , NULL );
333+ 
334+             /* Check to make sure that ret is a valid index and not an error code */ 
335+             if ( ret  >= 0  ) {
336+                 if ( mpi_t_offset  ==  -1  ) {
337+                     mpi_t_offset  =  ret ;
338+                 }
339+             }
340+             if ( (ret  <  0 ) ||  (ret  !=  (mpi_t_offset  +  found  -  1 )) ) {
341+                 mpi_t_enabled  =  false;
342+                 opal_show_help ("help-mpi-runtime.txt" , "spc: MPI_T disabled" , true);
343+                 break ;
335344            }
336-         }
337-         if ( (ret  <  0 ) ||  (ret  !=  (mpi_t_offset  +  found  -  1 )) ) {
338-             mpi_t_enabled  =  false;
339-             opal_show_help ("help-mpi-runtime.txt" , "spc: MPI_T disabled" , true);
340-             break ;
341345        }
342346    }
343-     /* If this is a timer event, sent the corresponding timer_event entry to 1 */ 
344-     SET_SPC_BIT (ompi_spc_timer_event , OMPI_SPC_MATCH_TIME );
347+ 
345348    opal_argv_free (arg_strings );
346349}
347350
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