11/*
2- * Copyright (c) 2018 The University of Tennessee and The University
2+ * Copyright (c) 2018-2019 The University of Tennessee and The University
33 * of Tennessee Research Foundation. All rights
44 * reserved.
55 *
66 * Copyright (c) 2018 Cisco Systems, Inc. All rights reserved
77 * Copyright (c) 2018 Research Organization for Information Science
88 * and Technology (RIST). All rights reserved.
9+ * Copyright (c) 2019 Mellanox Technologies, Inc.
10+ * All rights reserved.
911 * $COPYRIGHT$
1012 *
1113 * Additional copyrights may follow
@@ -20,10 +22,8 @@ opal_timer_t sys_clock_freq_mhz = 0;
2022static void ompi_spc_dump (void );
2123
2224/* Array for converting from SPC indices to MPI_T indices */
23- OMPI_DECLSPEC int mpi_t_offset = -1 ;
24- OMPI_DECLSPEC bool mpi_t_enabled = false;
25-
26- OPAL_DECLSPEC ompi_communicator_t * ompi_spc_comm = NULL ;
25+ static bool mpi_t_enabled = false;
26+ static ompi_communicator_t * ompi_spc_comm = NULL ;
2727
2828typedef struct ompi_spc_event_t {
2929 const char * counter_name ;
@@ -185,6 +185,8 @@ static int ompi_spc_notify(mca_base_pvar_t *pvar, mca_base_pvar_event_t event, v
185185 return MPI_SUCCESS ;
186186 }
187187
188+ index = (int )(uintptr_t )pvar -> ctx ; /* Convert from MPI_T pvar index to SPC index */
189+
188190 /* For this event, we need to set count to the number of long long type
189191 * values for this counter. All SPC counters are one long long, so we
190192 * always set count to 1.
@@ -194,14 +196,10 @@ static int ompi_spc_notify(mca_base_pvar_t *pvar, mca_base_pvar_event_t event, v
194196 }
195197 /* For this event, we need to turn on the counter */
196198 else if (MCA_BASE_PVAR_HANDLE_START == event ) {
197- /* Convert from MPI_T pvar index to SPC index */
198- index = pvar -> pvar_index - mpi_t_offset ;
199199 SET_SPC_BIT (ompi_spc_attached_event , index );
200200 }
201201 /* For this event, we need to turn off the counter */
202202 else if (MCA_BASE_PVAR_HANDLE_STOP == event ) {
203- /* Convert from MPI_T pvar index to SPC index */
204- index = pvar -> pvar_index - mpi_t_offset ;
205203 CLEAR_SPC_BIT (ompi_spc_attached_event , index );
206204 }
207205
@@ -231,7 +229,7 @@ static int ompi_spc_get_count(const struct mca_base_pvar_t *pvar, void *value, v
231229 }
232230
233231 /* Convert from MPI_T pvar index to SPC index */
234- int index = pvar -> pvar_index - mpi_t_offset ;
232+ int index = ( int )( uintptr_t ) pvar -> ctx ;
235233 /* Set the counter value to the current SPC value */
236234 * counter_value = (long long )ompi_spc_events [index ].value ;
237235 /* If this is a timer-based counter, convert from cycles to microseconds */
@@ -276,7 +274,7 @@ void ompi_spc_events_init(void)
276274 */
277275void ompi_spc_init (void )
278276{
279- int i , j , ret , found = 0 , all_on = 0 ;
277+ int i , j , ret , found = 0 , all_on = 0 , matched = 0 ;
280278
281279 /* Initialize the clock frequency variable as the CPU's frequency in MHz */
282280 sys_clock_freq_mhz = opal_timer_base_get_freq () / 1000000 ;
@@ -296,52 +294,43 @@ void ompi_spc_init(void)
296294 }
297295 }
298296
299- /* Turn on only the counters that were specified in the MCA parameter */
300297 for (i = 0 ; i < OMPI_SPC_NUM_COUNTERS ; i ++ ) {
301- if ( all_on ) {
302- SET_SPC_BIT ( ompi_spc_attached_event , i );
303- mpi_t_enabled = true ;
304- found ++ ;
305- } else {
306- /* Note: If no arguments were given, this will be skipped */
298+ /* Reset all timer-based counters */
299+ CLEAR_SPC_BIT ( ompi_spc_timer_event , i );
300+ matched = all_on ;
301+
302+ if ( ! matched ) {
303+ /* Turn on only the counters that were specified in the MCA parameter */
307304 for (j = 0 ; j < num_args ; j ++ ) {
308305 if ( 0 == strcmp (ompi_spc_events_names [i ].counter_name , arg_strings [j ]) ) {
309- SET_SPC_BIT (ompi_spc_attached_event , i );
310- mpi_t_enabled = true;
311- found ++ ;
306+ matched = 1 ;
312307 break ;
313308 }
314309 }
315310 }
316311
317- /* ########################################################################
318- * ################## Add Timer-Based Counter Enums Here ##################
319- * ########################################################################
320- */
321- CLEAR_SPC_BIT ( ompi_spc_timer_event , i );
312+ if ( matched ) {
313+ SET_SPC_BIT ( ompi_spc_attached_event , i );
314+ mpi_t_enabled = true;
315+ found ++ ;
316+ }
322317
323318 /* Registers the current counter as an MPI_T pvar regardless of whether it's been turned on or not */
324319 ret = mca_base_pvar_register ("ompi" , "runtime" , "spc" , ompi_spc_events_names [i ].counter_name , ompi_spc_events_names [i ].counter_description ,
325320 OPAL_INFO_LVL_4 , MPI_T_PVAR_CLASS_SIZE ,
326321 MCA_BASE_VAR_TYPE_UNSIGNED_LONG_LONG , NULL , MPI_T_BIND_NO_OBJECT ,
327322 MCA_BASE_PVAR_FLAG_READONLY | MCA_BASE_PVAR_FLAG_CONTINUOUS ,
328- ompi_spc_get_count , NULL , ompi_spc_notify , NULL );
329-
330- /* Check to make sure that ret is a valid index and not an error code.
331- */
332- if ( ret >= 0 ) {
333- if ( mpi_t_offset == -1 ) {
334- mpi_t_offset = ret ;
335- }
336- }
337- if ( (ret < 0 ) || (ret != (mpi_t_offset + found - 1 )) ) {
323+ ompi_spc_get_count , NULL , ompi_spc_notify , (void * )(uintptr_t )i );
324+ if ( ret < 0 ) {
338325 mpi_t_enabled = false;
339326 opal_show_help ("help-mpi-runtime.txt" , "spc: MPI_T disabled" , true);
340327 break ;
341328 }
342329 }
343- /* If this is a timer event, sent the corresponding timer_event entry to 1 */
330+
331+ /* If this is a timer event, set the corresponding timer_event entry */
344332 SET_SPC_BIT (ompi_spc_timer_event , OMPI_SPC_MATCH_TIME );
333+
345334 opal_argv_free (arg_strings );
346335}
347336
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