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LPC fixups #19
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LPC fixups #19
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5f288b5
Send IPL status codes to BMC over LPC port 81h/82h
madscientist159 deff903
Split LPC IPL status routine into LPC and IPL status specific files
a52dfeb
Add initial LPC read routine
370cb79
Add indexed read/write mechanism over LPC
dc84b71
Add method to clear latched LPC error status bits on demand
e4ee1b8
Clear residual LPC errors lodged in OPB status register before handof…
726f523
Make printf() over UART available for use when UART console is selected
364188f
Fix missing definitions of SBE_FUNC
9c223c6
Fix syntax error in trace statements
37a7cb4
Remove spurious semicolon after SBE_FUNC define
9f15fce
Add per-file debug log enable #define
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -7,6 +7,7 @@ | |
| /* */ | ||
| /* Contributors Listed Below - COPYRIGHT 2015,2018 */ | ||
| /* [+] International Business Machines Corp. */ | ||
| /* COPYRIGHT 2020 Raptor Engineering, LLC */ | ||
|
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Is this form of the copyright header right? |
||
| /* */ | ||
| /* */ | ||
| /* Licensed under the Apache License, Version 2.0 (the "License"); */ | ||
|
|
@@ -55,6 +56,7 @@ extern "C" | |
| const uint64_t LPC_LRESET_OUT = 22; | ||
| const uint32_t LPC_LRESET_DELAY_NS = 200000; | ||
| const uint32_t LPCM_OPB_MASTER_STATUS_REG = 0xC0010000; | ||
| const uint32_t LPCM_OPB_MASTER_ACTUAL_STATUS_REG = 0xC001004C; | ||
| const uint32_t LPCM_OPB_MASTER_STATUS_ERROR_BITS = 0x20000FC3; | ||
| const uint32_t LPCM_OPB_MASTER_CONTROL_REG = 0xC0010008; | ||
| const uint32_t LPCM_OPB_MASTER_CONTROL_REG_TIMEOUT_ENABLE = 2; | ||
|
|
@@ -63,8 +65,29 @@ extern "C" | |
| const uint32_t LPCM_LPC_MASTER_TIMEOUT_REG = 0xC001202C; | ||
| const uint32_t LPCM_LPC_MASTER_TIMEOUT_VALUE = 0xFE000000; | ||
| const uint32_t CPLT_CONF1_TC_LP_RESET = 12; | ||
| const uint32_t LPC_REG_OPB_BASE = 0XC0012000; | ||
| const uint32_t LPC_HC_IRQSTAT = 0x38; | ||
| const uint32_t LPC_HC_IRQ_LRESET = 0x00000400; | ||
| const uint32_t LPC_HC_IRQ_SYNC_ABNORM_ERR = 0x00000080; | ||
| const uint32_t LPC_HC_IRQ_SYNC_NORESP_ERR = 0x00000040; | ||
| const uint32_t LPC_HC_IRQ_SYNC_NORM_ERR = 0x00000020; | ||
| const uint32_t LPC_HC_IRQ_SYNC_TIMEOUT_ERR = 0x00000010; | ||
| const uint32_t LPC_HC_IRQ_TARG_TAR_ERR = 0x00000008; | ||
| const uint32_t LPC_HC_IRQ_BM_TAR_ERR = 0x00000004; | ||
| const uint32_t LPC_HC_IRQ_BM0_REQ = 0x00000002; | ||
| const uint32_t LPC_HC_IRQ_BM1_REQ = 0x00000001; | ||
| const uint32_t LPC_HC_IRQ_BASE_IRQS = ( \ | ||
| LPC_HC_IRQ_LRESET | \ | ||
| LPC_HC_IRQ_SYNC_ABNORM_ERR | \ | ||
| LPC_HC_IRQ_SYNC_NORESP_ERR | \ | ||
| LPC_HC_IRQ_SYNC_NORM_ERR | \ | ||
| LPC_HC_IRQ_SYNC_TIMEOUT_ERR | \ | ||
| LPC_HC_IRQ_TARG_TAR_ERR | \ | ||
| LPC_HC_IRQ_BM_TAR_ERR); | ||
| fapi2::ReturnCode p9_sbe_lpc_init(const | ||
| fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); | ||
| fapi2::ReturnCode p9_sbe_lpc_clear_errors(const | ||
| fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); | ||
| } | ||
|
|
||
| #endif | ||
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Is this form of the copyright header right?
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Probably not, actually. The whole header seems odd, it looks auto-generated but we don't have access to the tooling to regenerate it. If there's a preferred format I'll update.