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4 changes: 4 additions & 0 deletions src/build/img_defs.mk
Original file line number Diff line number Diff line change
Expand Up @@ -520,6 +520,10 @@ ifdef SBE_CONSOLE_SUPPORT
GCC-DEFS += -DSBE_CONSOLE_SUPPORT
endif

ifdef SBE_IPL_STATUS_LPC_SUPPORT
GCC-DEFS += -DSBE_IPL_STATUS_LPC_SUPPORT
endif

DEFS += $(GCC-DEFS)
###########################################################################

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1 change: 1 addition & 0 deletions src/build/power_defs.mk
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ HOST_INTERFACE_AVAILABLE = 1
PERIODIC_IO_TOGGLE_SUPPORTED = 1

SBE_CONSOLE_SUPPORT = 1
SBE_IPL_STATUS_LPC_SUPPORT = 1

export SBE_S0_SUPPORT = 1
export PIBMEM_REPAIR_SCOM_P9 = 1
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11 changes: 11 additions & 0 deletions src/hwpf/plat_trace.H
Original file line number Diff line number Diff line change
Expand Up @@ -45,16 +45,27 @@ extern "C"
#include "trac_interface.h"
}

#ifdef SBE_CONSOLE_SUPPORT
#include "printf.H"
#endif

// Why not a #define, why is this in the fapi2 namespace?
// To prevent problems with Cronus and the fapi1 definitions.
namespace fapi2
{
static const uint32_t MAX_ECMD_STRING_LEN = 64;
};

#if defined(SBE_CONSOLE_SUPPORT) && defined(ENABLE_CONSOLE_TRACE_IN_FILE)
#define FAPI_TRACE(_id_, _fmt_, _args_...) { \
printf(_fmt_, ##_args_); \
printf("\n\r"); \
}
#else
// Information traces (go into fast trace buffer that can wrap often)
#define FAPI_TRACE(_id_, _fmt_, _args_...) \
PK_TRACE(_fmt_, ##_args_);
#endif


/* The following is a desirous trace entry but the second line has a
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40 changes: 39 additions & 1 deletion src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* COPYRIGHT 2020 Raptor Engineering, LLC */
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Is this form of the copyright header right?

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Probably not, actually. The whole header seems odd, it looks auto-generated but we don't have access to the tooling to regenerate it. If there's a preferred format I'll update.

/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
Expand Down Expand Up @@ -35,7 +36,6 @@
// *HWP Consumed by : SBE
//------------------------------------------------------------------------------


//## auto_generated
#include "p9_sbe_lpc_init.H"

Expand All @@ -46,6 +46,9 @@

#include "p9_lpc_utils.H"

#include "sbeglobals.H"
#include "sbeConsole.H"

static fapi2::ReturnCode switch_lpc_clock_mux(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip,
bool use_nest_clock)
Expand Down Expand Up @@ -198,3 +201,38 @@ fapi_try_exit:
return fapi2::current_err;

}

fapi2::ReturnCode p9_sbe_lpc_clear_errors(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
fapi2::buffer<uint32_t> l_data32;
FAPI_DBG("p9_sbe_lpc_clear_errors: Entering ...");

FAPI_TRY(lpc_read(i_target_chip, LPCM_OPB_MASTER_STATUS_REG, l_data32),
"Error reading OPB master status register");
if (l_data32 & LPCM_OPB_MASTER_STATUS_ERROR_BITS)
{
SBE_MSG_CONSOLE("Errors detected on LPC bus during SBE execution");
SBE_MSG_CONSOLE("Clearing errors to allow HBBL start");

// Clear any stale LPC bus errors
l_data32 = LPCM_OPB_MASTER_STATUS_ERROR_BITS;
FAPI_TRY(lpc_write(i_target_chip, LPCM_OPB_MASTER_ACTUAL_STATUS_REG, l_data32), "Error clearing LPC error actual status register");
l_data32 = LPCM_OPB_MASTER_STATUS_ERROR_BITS;
FAPI_TRY(lpc_write(i_target_chip, LPCM_OPB_MASTER_STATUS_REG, l_data32), "Error clearing LPC error status register");
l_data32 = LPC_HC_IRQ_BASE_IRQS;
FAPI_TRY(lpc_write(i_target_chip, LPC_REG_OPB_BASE + LPC_HC_IRQSTAT, l_data32), "Error clearing LPC error status IRQ register");
}

// Verify errors are cleared
FAPI_TRY(lpc_read(i_target_chip, LPCM_OPB_MASTER_STATUS_REG, l_data32), "Error reading OPB master status register");
if (l_data32 & LPCM_OPB_MASTER_STATUS_ERROR_BITS)
{
SBE_MSG_CONSOLE("LPC error register still reporting failure! HBBL is likely to abort.");
}

FAPI_DBG("p9_sbe_lpc_clear_errors: Exiting ...");

fapi_try_exit:
return fapi2::current_err;
}
23 changes: 23 additions & 0 deletions src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* COPYRIGHT 2020 Raptor Engineering, LLC */
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Is this form of the copyright header right?

/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
Expand Down Expand Up @@ -55,6 +56,7 @@ extern "C"
const uint64_t LPC_LRESET_OUT = 22;
const uint32_t LPC_LRESET_DELAY_NS = 200000;
const uint32_t LPCM_OPB_MASTER_STATUS_REG = 0xC0010000;
const uint32_t LPCM_OPB_MASTER_ACTUAL_STATUS_REG = 0xC001004C;
const uint32_t LPCM_OPB_MASTER_STATUS_ERROR_BITS = 0x20000FC3;
const uint32_t LPCM_OPB_MASTER_CONTROL_REG = 0xC0010008;
const uint32_t LPCM_OPB_MASTER_CONTROL_REG_TIMEOUT_ENABLE = 2;
Expand All @@ -63,8 +65,29 @@ extern "C"
const uint32_t LPCM_LPC_MASTER_TIMEOUT_REG = 0xC001202C;
const uint32_t LPCM_LPC_MASTER_TIMEOUT_VALUE = 0xFE000000;
const uint32_t CPLT_CONF1_TC_LP_RESET = 12;
const uint32_t LPC_REG_OPB_BASE = 0XC0012000;
const uint32_t LPC_HC_IRQSTAT = 0x38;
const uint32_t LPC_HC_IRQ_LRESET = 0x00000400;
const uint32_t LPC_HC_IRQ_SYNC_ABNORM_ERR = 0x00000080;
const uint32_t LPC_HC_IRQ_SYNC_NORESP_ERR = 0x00000040;
const uint32_t LPC_HC_IRQ_SYNC_NORM_ERR = 0x00000020;
const uint32_t LPC_HC_IRQ_SYNC_TIMEOUT_ERR = 0x00000010;
const uint32_t LPC_HC_IRQ_TARG_TAR_ERR = 0x00000008;
const uint32_t LPC_HC_IRQ_BM_TAR_ERR = 0x00000004;
const uint32_t LPC_HC_IRQ_BM0_REQ = 0x00000002;
const uint32_t LPC_HC_IRQ_BM1_REQ = 0x00000001;
const uint32_t LPC_HC_IRQ_BASE_IRQS = ( \
LPC_HC_IRQ_LRESET | \
LPC_HC_IRQ_SYNC_ABNORM_ERR | \
LPC_HC_IRQ_SYNC_NORESP_ERR | \
LPC_HC_IRQ_SYNC_NORM_ERR | \
LPC_HC_IRQ_SYNC_TIMEOUT_ERR | \
LPC_HC_IRQ_TARG_TAR_ERR | \
LPC_HC_IRQ_BM_TAR_ERR);
fapi2::ReturnCode p9_sbe_lpc_init(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
fapi2::ReturnCode p9_sbe_lpc_clear_errors(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
}

#endif
20 changes: 20 additions & 0 deletions src/sbefw/app/power/ipl_table.C
Original file line number Diff line number Diff line change
Expand Up @@ -109,6 +109,8 @@
#include "p9_fbc_utils.H"
#include "sbeSecureMemRegionManager.H"

#include "sbeEarlyLPC.H"
#include "sbeIPLStatusLPC.H"
#include "sbeConsole.H"
#include "sbecmdflushnvdimm.H"

Expand Down Expand Up @@ -179,6 +181,7 @@ using sbeIstepHwpCacheInitf_t = ReturnCode (*)
// Wrapper function which will call HWP.
ReturnCode istepWithProc( voidfuncptr_t i_hwp );
ReturnCode istepLpcInit( voidfuncptr_t i_hwp );
ReturnCode istepLpcClearErrors( voidfuncptr_t i_hwp );
ReturnCode istepHwpTpSwitchGears( voidfuncptr_t i_hwp);
ReturnCode istepAttrSetup( voidfuncptr_t i_hwp );
ReturnCode istepNoOp( voidfuncptr_t i_hwp );
Expand Down Expand Up @@ -359,6 +362,7 @@ static istepMap_t g_istep5PtrTbl[]
{
#ifdef SEEPROM_IMAGE
ISTEP_MAP( istepLoadBootLoader, NULL ),
ISTEP_MAP( istepLpcClearErrors, p9_sbe_lpc_clear_errors ),
ISTEP_MAP( istepStartInstruction, p9_sbe_instruct_start ),
#endif
};
Expand Down Expand Up @@ -393,12 +397,27 @@ ReturnCode istepWithProc( voidfuncptr_t i_hwp)
}
//----------------------------------------------------------------------------

ReturnCode istepLpcClearErrors( voidfuncptr_t i_hwp)
{
#define SBE_FUNC "istepLpcClearErrors "

ReturnCode rc = FAPI2_RC_SUCCESS;
Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
assert( NULL != i_hwp );
SBE_EXEC_HWP(rc, reinterpret_cast<sbeIstepHwpProc_t>( i_hwp ), proc)

#undef SBE_FUNC

return rc;
}

ReturnCode istepLpcInit( voidfuncptr_t i_hwp)
{
ReturnCode rc = FAPI2_RC_SUCCESS;
Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
assert( NULL != i_hwp );
SBE_EXEC_HWP(rc, reinterpret_cast<sbeIstepHwpProc_t>( i_hwp ), proc)
SBE_LPC_INIT;
SBE_UART_INIT;
SBE_MSG_CONSOLE( SBE_CONSOLE_WELCOME_MSG );

Expand Down Expand Up @@ -662,6 +681,7 @@ ReturnCode istepStartInstruction( voidfuncptr_t i_hwp)
ReturnCode rc = FAPI2_RC_SUCCESS;

SBE_MSG_CONSOLE("SBE starting hostboot");
SBE_LPC_DISABLE;
SBE_UART_DISABLE;
rc = istepWithCore(i_hwp);
if(rc == FAPI2_RC_SUCCESS)
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2 changes: 1 addition & 1 deletion src/sbefw/app/power/sbecmdmemaccess.C
Original file line number Diff line number Diff line change
Expand Up @@ -250,7 +250,7 @@ uint32_t processPbaRequest(const sbeMemAccessReqMsgHdr_t &i_hdr,
// by LCO_mode (LCO Mode for PBA-Put)
if(i_hdr.isPbaLcoModeSet())
{
SBE_INFO(SBE_INFO "LCO Mode is set with Ex ChipletId[%d]",
SBE_INFO(SBE_FUNC "LCO Mode is set with Ex ChipletId[%d]",
(i_hdr.coreChipletId)/2);
//Derive the EX target from the input Core Chiplet Id
//Core0/1 -> EX0, Core2/3 -> EX1, Core4/5 -> EX2, Core6/7 -> EX3
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5 changes: 5 additions & 0 deletions src/sbefw/core/corefiles.mk
Original file line number Diff line number Diff line change
Expand Up @@ -56,11 +56,16 @@ COREPIBMEM_OBJECTS = $(COREPIBMEM-C-SOURCES:.c=.o) $(COREPIBMEM-CPP-SOURCES:.C=.

# seeprom objects
CORESEEPROM-CPP-SOURCES = sbeSecureMemRegionManager.C
CORESEEPROM-CPP-SOURCES += sbeEarlyLPC.C
ifeq ($(SBE_S0_SUPPORT), 1)
CORESEEPROM-CPP-SOURCES += sbes0handler.C
endif
ifeq ($(SBE_CONSOLE_SUPPORT), 1)
CORESEEPROM-CPP-SOURCES += sbeConsole.C
CORESEEPROM-CPP-SOURCES += printf.C
endif
ifeq ($(SBE_IPL_STATUS_LPC_SUPPORT), 1)
CORESEEPROM-CPP-SOURCES += sbeIPLStatusLPC.C
endif

CORESEEPROM-C-SOURCES =
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2 changes: 2 additions & 0 deletions src/sbefw/core/ipl.C
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@

#include "ipl.H"
#include "sbeConsole.H"
#include "sbeIPLStatusLPC.H"
#include "sbeglobals.H"

#include "p9n2_perv_scom_addresses.H"
Expand Down Expand Up @@ -122,6 +123,7 @@ void sbeDoContinuousIpl()
auto istepMap = &istepTableEntry->istepMinorArr[step-1];
if(istepMap->istepWrapper != NULL)
{
SBE_PUT_ISTEP_LPC(istepTableEntry->istepMajorNum, step);
SBE_MSG_CONSOLE("istep ", istepTableEntry->istepMajorNum, ".", step);
rc = istepMap->istepWrapper(istepMap->istepHwp);
}
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