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| 1 | +#include "instructions.hh" |
| 2 | + |
| 3 | +namespace Instructions { |
| 4 | + // to workaround duplicated .init issue in Swift |
| 5 | + Trap::Trap() {} |
| 6 | + Fallthrough::Fallthrough() {} |
| 7 | + |
| 8 | + const uint8_t Trap::opcode = 0; |
| 9 | + const uint8_t Fallthrough::opcode = 1; |
| 10 | + const uint8_t Ecalli::opcode = 10; |
| 11 | + const uint8_t LoadImm64::opcode = 20; |
| 12 | + const uint8_t StoreImmU8::opcode = 30; |
| 13 | + const uint8_t StoreImmU16::opcode = 31; |
| 14 | + const uint8_t StoreImmU32::opcode = 32; |
| 15 | + const uint8_t StoreImmU64::opcode = 33; |
| 16 | + const uint8_t Jump::opcode = 40; |
| 17 | + const uint8_t JumpInd::opcode = 50; |
| 18 | + const uint8_t LoadImm::opcode = 51; |
| 19 | + const uint8_t LoadU8::opcode = 52; |
| 20 | + const uint8_t LoadI8::opcode = 53; |
| 21 | + const uint8_t LoadU16::opcode = 54; |
| 22 | + const uint8_t LoadI16::opcode = 55; |
| 23 | + const uint8_t LoadU32::opcode = 56; |
| 24 | + const uint8_t LoadI32::opcode = 57; |
| 25 | + const uint8_t LoadU64::opcode = 58; |
| 26 | + const uint8_t StoreU8::opcode = 59; |
| 27 | + const uint8_t StoreU16::opcode = 60; |
| 28 | + const uint8_t StoreU32::opcode = 61; |
| 29 | + const uint8_t StoreU64::opcode = 62; |
| 30 | + const uint8_t StoreImmIndU8::opcode = 70; |
| 31 | + const uint8_t StoreImmIndU16::opcode = 71; |
| 32 | + const uint8_t StoreImmIndU32::opcode = 72; |
| 33 | + const uint8_t StoreImmIndU64::opcode = 73; |
| 34 | + const uint8_t LoadImmJump::opcode = 80; |
| 35 | + const uint8_t BranchEqImm::opcode = 81; |
| 36 | + const uint8_t BranchNeImm::opcode = 82; |
| 37 | + const uint8_t BranchLtUImm::opcode = 83; |
| 38 | + const uint8_t BranchLeUImm::opcode = 84; |
| 39 | + const uint8_t BranchGeUImm::opcode = 85; |
| 40 | + const uint8_t BranchGtUImm::opcode = 86; |
| 41 | + const uint8_t BranchLtSImm::opcode = 87; |
| 42 | + const uint8_t BranchLeSImm::opcode = 88; |
| 43 | + const uint8_t BranchGeSImm::opcode = 89; |
| 44 | + const uint8_t BranchGtSImm::opcode = 90; |
| 45 | + const uint8_t MoveReg::opcode = 100; |
| 46 | + const uint8_t Sbrk::opcode = 101; |
| 47 | + const uint8_t CountSetBits64::opcode = 102; |
| 48 | + const uint8_t CountSetBits32::opcode = 103; |
| 49 | + const uint8_t LeadingZeroBits64::opcode = 104; |
| 50 | + const uint8_t LeadingZeroBits32::opcode = 105; |
| 51 | + const uint8_t TrailingZeroBits64::opcode = 106; |
| 52 | + const uint8_t TrailingZeroBits32::opcode = 107; |
| 53 | + const uint8_t SignExtend8::opcode = 108; |
| 54 | + const uint8_t SignExtend16::opcode = 109; |
| 55 | + const uint8_t ZeroExtend16::opcode = 110; |
| 56 | + const uint8_t ReverseBytes::opcode = 111; |
| 57 | + const uint8_t StoreIndU8::opcode = 120; |
| 58 | + const uint8_t StoreIndU16::opcode = 121; |
| 59 | + const uint8_t StoreIndU32::opcode = 122; |
| 60 | + const uint8_t StoreIndU64::opcode = 123; |
| 61 | + const uint8_t LoadIndU8::opcode = 124; |
| 62 | + const uint8_t LoadIndI8::opcode = 125; |
| 63 | + const uint8_t LoadIndU16::opcode = 126; |
| 64 | + const uint8_t LoadIndI16::opcode = 127; |
| 65 | + const uint8_t LoadIndU32::opcode = 128; |
| 66 | + const uint8_t LoadIndI32::opcode = 129; |
| 67 | + const uint8_t LoadIndU64::opcode = 130; |
| 68 | + const uint8_t AddImm32::opcode = 131; |
| 69 | + const uint8_t AndImm::opcode = 132; |
| 70 | + const uint8_t XorImm::opcode = 133; |
| 71 | + const uint8_t OrImm::opcode = 134; |
| 72 | + const uint8_t MulImm32::opcode = 135; |
| 73 | + const uint8_t SetLtUImm::opcode = 136; |
| 74 | + const uint8_t SetLtSImm::opcode = 137; |
| 75 | + const uint8_t ShloLImm32::opcode = 138; |
| 76 | + const uint8_t ShloRImm32::opcode = 139; |
| 77 | + const uint8_t SharRImm32::opcode = 140; |
| 78 | + const uint8_t NegAddImm32::opcode = 141; |
| 79 | + const uint8_t SetGtUImm::opcode = 142; |
| 80 | + const uint8_t SetGtSImm::opcode = 143; |
| 81 | + const uint8_t ShloLImmAlt32::opcode = 144; |
| 82 | + const uint8_t ShloRImmAlt32::opcode = 145; |
| 83 | + const uint8_t SharRImmAlt32::opcode = 146; |
| 84 | + const uint8_t CmovIzImm::opcode = 147; |
| 85 | + const uint8_t CmovNzImm::opcode = 148; |
| 86 | + const uint8_t AddImm64::opcode = 149; |
| 87 | + const uint8_t MulImm64::opcode = 150; |
| 88 | + const uint8_t ShloLImm64::opcode = 151; |
| 89 | + const uint8_t ShloRImm64::opcode = 152; |
| 90 | + const uint8_t SharRImm64::opcode = 153; |
| 91 | + const uint8_t NegAddImm64::opcode = 154; |
| 92 | + const uint8_t ShloLImmAlt64::opcode = 155; |
| 93 | + const uint8_t ShloRImmAlt64::opcode = 156; |
| 94 | + const uint8_t SharRImmAlt64::opcode = 157; |
| 95 | + const uint8_t RotR64Imm::opcode = 158; |
| 96 | + const uint8_t RotR64ImmAlt::opcode = 159; |
| 97 | + const uint8_t RotR32Imm::opcode = 160; |
| 98 | + const uint8_t RotR32ImmAlt::opcode = 161; |
| 99 | + const uint8_t BranchEq::opcode = 170; |
| 100 | + const uint8_t BranchNe::opcode = 171; |
| 101 | + const uint8_t BranchLtU::opcode = 172; |
| 102 | + const uint8_t BranchLtS::opcode = 173; |
| 103 | + const uint8_t BranchGeU::opcode = 174; |
| 104 | + const uint8_t BranchGeS::opcode = 175; |
| 105 | + const uint8_t LoadImmJumpInd::opcode = 180; |
| 106 | + const uint8_t Add32::opcode = 190; |
| 107 | + const uint8_t Sub32::opcode = 191; |
| 108 | + const uint8_t Mul32::opcode = 192; |
| 109 | + const uint8_t DivU32::opcode = 193; |
| 110 | + const uint8_t DivS32::opcode = 194; |
| 111 | + const uint8_t RemU32::opcode = 195; |
| 112 | + const uint8_t RemS32::opcode = 196; |
| 113 | + const uint8_t ShloL32::opcode = 197; |
| 114 | + const uint8_t ShloR32::opcode = 198; |
| 115 | + const uint8_t SharR32::opcode = 199; |
| 116 | + const uint8_t Add64::opcode = 200; |
| 117 | + const uint8_t Sub64::opcode = 201; |
| 118 | + const uint8_t Mul64::opcode = 202; |
| 119 | + const uint8_t DivU64::opcode = 203; |
| 120 | + const uint8_t DivS64::opcode = 204; |
| 121 | + const uint8_t RemU64::opcode = 205; |
| 122 | + const uint8_t RemS64::opcode = 206; |
| 123 | + const uint8_t ShloL64::opcode = 207; |
| 124 | + const uint8_t ShloR64::opcode = 208; |
| 125 | + const uint8_t SharR64::opcode = 209; |
| 126 | + const uint8_t And::opcode = 210; |
| 127 | + const uint8_t Xor::opcode = 211; |
| 128 | + const uint8_t Or::opcode = 212; |
| 129 | + const uint8_t MulUpperSS::opcode = 213; |
| 130 | + const uint8_t MulUpperUU::opcode = 214; |
| 131 | + const uint8_t MulUpperSU::opcode = 215; |
| 132 | + const uint8_t SetLtU::opcode = 216; |
| 133 | + const uint8_t SetLtS::opcode = 217; |
| 134 | + const uint8_t CmovIz::opcode = 218; |
| 135 | + const uint8_t CmovNz::opcode = 219; |
| 136 | + const uint8_t RotL64::opcode = 220; |
| 137 | + const uint8_t RotL32::opcode = 221; |
| 138 | + const uint8_t RotR64::opcode = 222; |
| 139 | + const uint8_t RotR32::opcode = 223; |
| 140 | + const uint8_t AndInv::opcode = 224; |
| 141 | + const uint8_t OrInv::opcode = 225; |
| 142 | + const uint8_t Xnor::opcode = 226; |
| 143 | + const uint8_t Max::opcode = 227; |
| 144 | + const uint8_t MaxU::opcode = 228; |
| 145 | + const uint8_t Min::opcode = 229; |
| 146 | + const uint8_t MinU::opcode = 230; |
| 147 | +} |
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