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!133 [AArch64] Support HiSilicon's hip11 subtarget
From: @xiajingze Reviewed-by: @cf-zhao Signed-off-by: @cf-zhao
2 parents 2350e0b + d905a77 commit 24b63e7

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‎clang/test/Driver/aarch64-hip11.c‎

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// RUN: %clang -target aarch64_be -mcpu=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11-BE %s
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// RUN: %clang -target aarch64 -mbig-endian -mcpu=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11-BE %s
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// RUN: %clang -target aarch64_be -mbig-endian -mcpu=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11-BE %s
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// RUN: %clang -target aarch64_be -mtune=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11-BE-TUNE %s
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// RUN: %clang -target aarch64 -mbig-endian -mtune=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11-BE-TUNE %s
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// RUN: %clang -target aarch64_be -mbig-endian -mtune=hip11 -### -c %s 2>&1 | FileCheck -check-prefix=HIP11_BE_TUNE %s
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// HIP11-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "hip11"
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// HIP11-BE_TUNE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic"

‎clang/test/Misc/target-invalid-cpu-note.c‎

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@@ -5,11 +5,11 @@
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// RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AARCH64
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// AARCH64: error: unknown target CPU 'not-a-cpu'
8-
// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-m1, apple-m2, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, hip09, hip10c, grace{{$}}
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// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-m1, apple-m2, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, hip09, hip10c, hip11, grace{{$}}
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// RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
1111
// TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'
12-
// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-m1, apple-m2, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, hip09, hip10c, grace{{$}}
12+
// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-m1, apple-m2, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, hip09, hip10c, hip11, grace{{$}}
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// RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86
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// X86: error: unknown target CPU 'not-a-cpu'

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h‎

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@@ -556,6 +556,13 @@ inline constexpr CpuInfo CpuInfos[] = {
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AArch64::AEK_RAND | AArch64::AEK_SB | AArch64::AEK_SHA2 |
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AArch64::AEK_SHA3 | AArch64::AEK_SM4 | AArch64::AEK_SSBS |
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AArch64::AEK_SVE | AArch64::AEK_BF16 | AArch64::AEK_I8MM)},
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{"hip11", ARMV9A,
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(AArch64::AEK_AES | AArch64::AEK_SM4 | AArch64::AEK_SHA2 |
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AArch64::AEK_SHA3 | AArch64::AEK_MTE | AArch64::AEK_PAUTH |
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AArch64::AEK_FLAGM | AArch64::AEK_SB | AArch64::AEK_I8MM |
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AArch64::AEK_FP16FML | AArch64::AEK_SVE | AArch64::AEK_SVE2 |
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AArch64::AEK_SVE2BITPERM | AArch64::AEK_BF16 | AArch64::AEK_SME |
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AArch64::AEK_SMEF64F64 | AArch64::AEK_SMEFA64)},
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};
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// An alias for a CPU.

‎llvm/lib/Target/AArch64/AArch64.td‎

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@@ -1236,6 +1236,17 @@ def TuneHIP10C : SubtargetFeature<"hip10c", "ARMProcFamily", "HIP10C",
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FeatureAscendStoreAddress,
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FeaturePostRAScheduler]>;
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def TuneHIP11 : SubtargetFeature<"hip11", "ARMProcFamily", "HIP11",
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"HiSilicon HIP11 processors", [
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FeatureCustomCheapAsMoveHandling,
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FeatureExperimentalZeroingPseudos,
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FeatureFuseAES,
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FeatureLSLFast,
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FeatureAscendStoreAddress,
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FeatureCmpBccFusion,
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FeatureArithmeticBccFusion,
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FeaturePostRAScheduler]>;
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def TuneAmpere1 : SubtargetFeature<"ampere1", "ARMProcFamily", "Ampere1",
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"Ampere Computing Ampere-1 processors", [
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FeaturePostRAScheduler,
@@ -1400,6 +1411,10 @@ def ProcessorFeatures {
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FeatureMatMulFP32, FeatureMatMulFP64, FeatureMTE, FeaturePerfMon,
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FeatureRandGen, FeatureSHA2, FeatureSHA3, FeatureSM4, FeatureWFxT,
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FeatureBF16, FeatureMatMulInt8];
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list<SubtargetFeature> HIP11 = [HasV9_0aOps, FeaturePerfMon, FeatureETE, FeatureMTE,
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FeatureFP16FML, FeatureSVE2BitPerm, FeatureBF16,
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FeatureMatMulInt8, FeatureCrypto, FeatureSHA3, FeatureSM4,
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FeatureSME, FeatureSMEF64F64, FeatureSMEFA64];
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list<SubtargetFeature> Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon,
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FeatureSSBS, FeatureRandGen, FeatureSB,
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FeatureSHA2, FeatureSHA3, FeatureAES];
@@ -1514,6 +1529,9 @@ def : ProcessorModel<"hip09", HIP09Model, ProcessorFeatures.HIP09,
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// FIXME: Hisilicon HIP10C is currently modeled as a Cortex-A57
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def : ProcessorModel<"hip10c", CortexA57Model, ProcessorFeatures.HIP10C,
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[TuneHIP10C]>;
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// FIXME: Hisilicon HIP11 is currently modeled as a Cortex-A57.
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def : ProcessorModel<"hip11", CortexA57Model, ProcessorFeatures.HIP11,
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[TuneHIP11]>;
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// Support cyclone as an alias for apple-a7 so we can still LTO old bitcode.
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def : ProcessorModel<"cyclone", CycloneModel, ProcessorFeatures.AppleA7,

‎llvm/lib/Target/AArch64/AArch64Subtarget.cpp‎

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@@ -280,6 +280,13 @@ void AArch64Subtarget::initializeProperties() {
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VScaleForTuning = 2;
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DefaultSVETFOpts = TailFoldingOpts::Simple;
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break;
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case HIP11:
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CacheLineSize = 64;
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PrefFunctionAlignment = Align(16);
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PrefLoopAlignment = Align(4);
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VScaleForTuning = 4;
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DefaultSVETFOpts = TailFoldingOpts::Simple;
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break;
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case ThunderX3T110:
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CacheLineSize = 64;
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PrefFunctionAlignment = Align(16);

‎llvm/lib/Target/AArch64/AArch64Subtarget.h‎

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@@ -89,7 +89,8 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
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ThunderX3T110,
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TSV110,
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HIP09,
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HIP10C
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HIP10C,
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HIP11
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};
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protected:

‎llvm/lib/TargetParser/Host.cpp‎

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@@ -259,6 +259,7 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
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.Case("0xd01", "tsv110")
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.Case("0xd02", "hip09")
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.Case("0xd45", "hip10c")
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.Case("0xd22", "hip11")
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.Default("generic");
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if (Implementer == "0x51") // Qualcomm Technologies, Inc.

‎llvm/test/CodeGen/AArch64/cpus.ll‎

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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=tsv110 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=hip09 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=hip10c 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=hip11 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=apple-latest 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=a64fx 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=ampere1 2>&1 | FileCheck %s

‎llvm/test/CodeGen/AArch64/remat.ll‎

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@@ -24,6 +24,7 @@
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=tsv110 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=hip09 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=hip10c -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=hip11 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mattr=+custom-cheap-as-move -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=thunderx3t110 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=ampere1 -o - %s | FileCheck %s

‎llvm/unittests/TargetParser/Host.cpp‎

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@@ -256,6 +256,9 @@ CPU part : 0x0a1
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
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"CPU part : 0xd45"),
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"hip10c");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
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"CPU part : 0xd22"),
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"hip11");
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260263
// Verify A64FX.
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const std::string A64FXProcCpuInfo = R"(

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