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MikeOpenHWGroupMikeOpenHWGroup
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Merge pull request #2414 from XavierAubert/cv32e40p/dev_dd_ww16_PR
CV32E40Pv2 Verification update Week 16 PR
2 parents 6d973dd + 24247c3 commit f812498

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-88
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22 files changed

+5767
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‎cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ class cv32e40p_instr extends riscv_instr;
2020
// additionnal helper fields
2121
bit is_post_incr;
2222
bit is_r_format ;
23+
bit is_simd_imm_legal = 1;
2324

2425
bit hw_loop_label;
2526

@@ -676,7 +677,30 @@ class cv32e40p_instr extends riscv_instr;
676677
this.is_r_format = rhs_.is_r_format;
677678
endfunction : do_copy
678679

680+
virtual function void override_imm();
681+
if (category == SIMD) begin
682+
if (is_simd_imm_legal) begin
683+
case (instr_name)
684+
CV_EXTRACT_H, CV_EXTRACTU_H, CV_INSERT_H : imm[5:1] = 5'd0;
685+
CV_EXTRACT_B, CV_EXTRACTU_B, CV_INSERT_B, CV_SHUFFLE_SCI_H : imm[5:2] = 4'd0;
686+
CV_SLL_SCI_B, CV_SRL_SCI_B, CV_SRA_SCI_B : imm[5:3] = 3'd0;
687+
CV_SLL_SCI_H, CV_SRL_SCI_H, CV_SRA_SCI_H : imm[5:4] = 2'd0;
688+
endcase
689+
end
690+
else begin
691+
// below imms value lead to illegal exception
692+
case (instr_name)
693+
CV_EXTRACT_H, CV_EXTRACTU_H, CV_INSERT_H : imm[5:1] = $urandom_range(1, 31);
694+
CV_EXTRACT_B, CV_EXTRACTU_B, CV_INSERT_B, CV_SHUFFLE_SCI_H : imm[5:2] = $urandom_range(1, 15);
695+
CV_SLL_SCI_B, CV_SRL_SCI_B, CV_SRA_SCI_B : imm[5:3] = $urandom_range(1, 7);
696+
CV_SLL_SCI_H, CV_SRL_SCI_H, CV_SRA_SCI_H : imm[5:4] = $urandom_range(1, 3);
697+
endcase
698+
end
699+
end
700+
endfunction : override_imm
701+
679702
virtual function void update_imm_str();
703+
override_imm();
680704
if (category == BRANCH_IMM) begin
681705
// for branch imm, immediate is split in two parts
682706
imm_str = $sformatf("%0d, %0d", $signed(imm[16:12]), $signed(imm[11:0]));

‎cv32e40p/env/corev-dv/instr_lib/cv32e40p_instr_for_func_cvg_lib.sv‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,6 @@ class cv32e40p_cv_instrs_multi_loops_streams extends cv32e40p_float_zfinx_base_i
3131
int unsigned loop_cnt = 0;
3232
int unsigned total_instr = 0;
3333
int unsigned loop_cnt_limit = 0;
34-
int unsigned ignored_instr_cnt = 0;
3534

3635
`uvm_object_utils(cv32e40p_cv_instrs_multi_loops_streams)
3736
`uvm_object_new
@@ -47,14 +46,14 @@ class cv32e40p_cv_instrs_multi_loops_streams extends cv32e40p_float_zfinx_base_i
4746
include_group = new[1] ({RV32X});
4847
exclude_instr = new[9] ({CV_START, CV_STARTI, CV_END, CV_ENDI, CV_COUNT, CV_COUNTI, CV_SETUP, CV_SETUPI, CV_ELW});
4948

50-
// these already covered in all cvg, can be ignored meantime - Start (note: users can modify this to focus on insn list to b ecovered)
51-
ignored_instr_cnt = 4;
52-
exclude_instr = new[exclude_instr.size()+ignored_instr_cnt] ({exclude_instr, CV_MAX, CV_ADDN, CV_AVG_SCI_H, CV_SHUFFLEI3_SCI_B});
49+
// these already covered in all cvg, can be ignored meantime - Start (note: users can modify this to focus on insn list to be covered)
50+
// example coding to reduce already covered instrs in previous accumulated coverage
51+
// exclude_instr = new[exclude_instr.size()+4] ({exclude_instr, CV_MAX, CV_ADDN, CV_AVG_SCI_H, CV_SHUFFLEI3_SCI_B});
5352
// these already covered in all cvg, can be ignored meantime - End
5453

5554
if (include_load_store_base_sp) begin // cover c_[s|l]wsp insn only
5655
include_group = new[include_group.size()+1] ({include_group, RV32C});
57-
// these already covered in all cvg, can be ignored meantime - Start (note: users can modify this to focus on insn list to b ecovered)
56+
// these already covered in all cvg, can be ignored meantime - Start (note: users can modify this to focus on insn list to be covered)
5857
exclude_instr = new[exclude_instr.size()+25] ({exclude_instr, C_LW, C_SW, C_ADDI4SPN, C_ADDI, C_LI, C_ADDI16SP, C_LUI,
5958
C_SRLI, C_SRAI, C_ANDI, C_SUB, C_XOR, C_OR, C_AND, C_BEQZ, C_BNEZ, C_SLLI, C_MV, C_EBREAK, C_ADD, C_NOP, C_J,
6059
C_JAL, C_JR, C_JALR});

‎cv32e40p/env/corev-dv/instr_lib/cv32e40p_pulp_hwloop_instr_lib.sv‎

Lines changed: 44 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ class cv32e40p_xpulp_hwloop_base_stream extends cv32e40p_xpulp_rand_stream;
7474

7575
localparam MAX_HWLOOP_INSTR_GEN = 4095;
7676
rand riscv_reg_t hwloop_avail_regs[];
77-
rand bit[1:0] num_loops_active;
77+
rand int unsigned num_loops_active;
7878
rand bit gen_nested_loop; //nested or not-nested hwloop
7979
rand bit use_setup_inst[2];
8080
rand bit use_loop_counti_inst[2];
@@ -1324,6 +1324,49 @@ class cv32e40p_xpulp_short_hwloop_stream_directed extends cv32e40p_xpulp_short_h
13241324
endfunction : new
13251325

13261326
endclass : cv32e40p_xpulp_short_hwloop_stream_directed
1327+
// directed test for more non-nested hwloop only with small loop count and lesser instrs
1328+
class cv32e40p_xpulp_short_single_hwloop_stream_directed extends cv32e40p_xpulp_short_hwloop_stream;
1329+
1330+
`uvm_object_utils_begin(cv32e40p_xpulp_short_single_hwloop_stream_directed)
1331+
`uvm_field_int(num_loops_active, UVM_DEFAULT)
1332+
`uvm_field_int(gen_nested_loop, UVM_DEFAULT)
1333+
`uvm_field_sarray_int(use_setup_inst, UVM_DEFAULT)
1334+
`uvm_field_sarray_int(use_loop_counti_inst, UVM_DEFAULT)
1335+
`uvm_field_sarray_int(use_loop_starti_inst, UVM_DEFAULT)
1336+
`uvm_field_sarray_int(use_loop_endi_inst, UVM_DEFAULT)
1337+
`uvm_field_sarray_int(use_loop_setupi_inst, UVM_DEFAULT)
1338+
`uvm_field_sarray_int(hwloop_count, UVM_DEFAULT)
1339+
`uvm_field_sarray_int(hwloop_counti, UVM_DEFAULT)
1340+
`uvm_field_sarray_int(num_hwloop_instr, UVM_DEFAULT)
1341+
`uvm_field_sarray_int(num_hwloop_ctrl_instr, UVM_DEFAULT)
1342+
`uvm_field_sarray_int(num_fill_instr_loop_ctrl_to_loop_start, UVM_DEFAULT)
1343+
`uvm_field_int(num_fill_instr_in_loop1_till_loop0_setup, UVM_DEFAULT)
1344+
`uvm_field_int(setup_l0_before_l1_start, UVM_DEFAULT)
1345+
`uvm_field_sarray_int(num_instr_cv_start_to_loop_start_label, UVM_DEFAULT)
1346+
`uvm_field_int(loop0_high_count, UVM_DEFAULT)
1347+
`uvm_object_utils_end
1348+
1349+
constraint gen_hwloop_count_c {
1350+
1351+
solve gen_nested_loop, loop0_high_count before hwloop_count, hwloop_counti;
1352+
solve gen_nested_loop before loop0_high_count;
1353+
1354+
gen_nested_loop == 0;
1355+
num_loops_active inside {[800:1000]};
1356+
1357+
foreach(hwloop_counti[i]) {
1358+
hwloop_counti[i] inside {2,3};
1359+
}
1360+
foreach(hwloop_count[i]) {
1361+
hwloop_count[i] inside {2,3};
1362+
}
1363+
}
1364+
1365+
function new(string name = "cv32e40p_xpulp_short_single_hwloop_stream_directed");
1366+
super.new(name);
1367+
endfunction : new
1368+
1369+
endclass : cv32e40p_xpulp_short_single_hwloop_stream_directed
13271370

13281371

13291372
//Class: cv32e40p_xpulp_long_hwloop_stream

‎cv32e40p/regress/cv32e40pv2_for_func_cvg_improvement.yaml‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,3 +62,39 @@ tests:
6262
dir: cv32e40p/sim/uvmt
6363
cmd: make test COREV=YES TEST=debug_test_trigger
6464
num: 1
65+
66+
fpu_func_cov_improve_test:
67+
build: uvmt_cv32e40p
68+
description: directed custom test to improve missing coverage in cfg pulp_fpu
69+
dir: cv32e40p/sim/uvmt
70+
cmd: make test TEST=fpu_func_cov_improve_test CFG_PLUSARGS="+UVM_TIMEOUT=100000000"
71+
num: 1
72+
skip_sim:
73+
- pulp
74+
- pulp_zfinx
75+
- pulp_zfinx_1cyclat
76+
- pulp_zfinx_2cyclat
77+
- pulp_cluster
78+
- pulp_cluster_fpu
79+
- pulp_cluster_fpu_1cyclat
80+
- pulp_cluster_fpu_2cyclat
81+
- default
82+
- no_pulp
83+
84+
zfinx_func_cov_improve_test:
85+
build: uvmt_cv32e40p
86+
description: directed custom test to improve missing coverage in cfg pulp_zfinx
87+
dir: cv32e40p/sim/uvmt
88+
cmd: make test TEST=zfinx_func_cov_improve_test CFG_PLUSARGS="+UVM_TIMEOUT=100000000"
89+
num: 1
90+
skip_sim:
91+
- pulp
92+
- pulp_fpu
93+
- pulp_fpu_1cyclat
94+
- pulp_fpu_2cyclat
95+
- pulp_cluster
96+
- pulp_cluster_fpu
97+
- pulp_cluster_fpu_1cyclat
98+
- pulp_cluster_fpu_2cyclat
99+
- default
100+
- no_pulp

‎cv32e40p/regress/cv32e40pv2_fpu_instr.yaml‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,3 +63,39 @@ tests:
6363
dir: cv32e40p/sim/uvmt
6464
cmd: make test TEST=illegal_fp_instr_test CFG_PLUSARGS="+UVM_TIMEOUT=100000000"
6565
num: 1
66+
67+
fpu_func_cov_improve_test:
68+
build: uvmt_cv32e40p
69+
description: directed custom test to improve missing coverage in cfg pulp_fpu
70+
dir: cv32e40p/sim/uvmt
71+
cmd: make test TEST=fpu_func_cov_improve_test CFG_PLUSARGS="+UVM_TIMEOUT=100000000"
72+
num: 1
73+
skip_sim:
74+
- pulp
75+
- pulp_zfinx
76+
- pulp_zfinx_1cyclat
77+
- pulp_zfinx_2cyclat
78+
- pulp_cluster
79+
- pulp_cluster_fpu
80+
- pulp_cluster_fpu_1cyclat
81+
- pulp_cluster_fpu_2cyclat
82+
- default
83+
- no_pulp
84+
85+
zfinx_func_cov_improve_test:
86+
build: uvmt_cv32e40p
87+
description: directed custom test to improve missing coverage in cfg pulp_zfinx
88+
dir: cv32e40p/sim/uvmt
89+
cmd: make test TEST=zfinx_func_cov_improve_test CFG_PLUSARGS="+UVM_TIMEOUT=100000000"
90+
num: 1
91+
skip_sim:
92+
- pulp
93+
- pulp_fpu
94+
- pulp_fpu_1cyclat
95+
- pulp_fpu_2cyclat
96+
- pulp_cluster
97+
- pulp_cluster_fpu
98+
- pulp_cluster_fpu_1cyclat
99+
- pulp_cluster_fpu_2cyclat
100+
- default
101+
- no_pulp

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