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duke
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Backport 5d5ae35288989fcfabdea013b6e3cdafe359f0df
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12 files changed

+902
-1
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12 files changed

+902
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‎src/hotspot/cpu/x86/assembler_x86.cpp‎

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3555,6 +3555,14 @@ void Assembler::movsd(Address dst, XMMRegister src) {
35553555
emit_operand(src, dst, 0);
35563556
}
35573557

3558+
void Assembler::vmovsd(XMMRegister dst, XMMRegister src, XMMRegister src2) {
3559+
assert(UseAVX > 0, "Requires some form of AVX");
3560+
InstructionMark im(this);
3561+
InstructionAttr attributes(AVX_128bit, /* rex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
3562+
int encode = vex_prefix_and_encode(src2->encoding(), src->encoding(), dst->encoding(), VEX_SIMD_F2, VEX_OPCODE_0F, &attributes);
3563+
emit_int16(0x11, (0xC0 | encode));
3564+
}
3565+
35583566
void Assembler::movss(XMMRegister dst, XMMRegister src) {
35593567
NOT_LP64(assert(VM_Version::supports_sse(), ""));
35603568
InstructionAttr attributes(AVX_128bit, /* rex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
@@ -6547,6 +6555,29 @@ void Assembler::vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2)
65476555
emit_int16((unsigned char)0xB9, (0xC0 | encode));
65486556
}
65496557

6558+
void Assembler::evfnmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2, EvexRoundPrefix rmode) { // Need to add rmode for rounding mode support
6559+
assert(VM_Version::supports_evex(), "");
6560+
InstructionAttr attributes(rmode, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
6561+
attributes.set_extended_context();
6562+
attributes.set_is_evex_instruction();
6563+
int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
6564+
emit_int16((unsigned char)0xAD, (0xC0 | encode));
6565+
}
6566+
6567+
void Assembler::vfnmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
6568+
assert(VM_Version::supports_fma(), "");
6569+
InstructionAttr attributes(AVX_128bit, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
6570+
int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
6571+
emit_int16((unsigned char)0xAD, (0xC0 | encode));
6572+
}
6573+
6574+
void Assembler::vfnmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
6575+
assert(VM_Version::supports_fma(), "");
6576+
InstructionAttr attributes(AVX_128bit, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
6577+
int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
6578+
emit_int16((unsigned char)0xBD, (0xC0 | encode));
6579+
}
6580+
65506581
void Assembler::vfmadd231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
65516582
assert(VM_Version::supports_fma(), "");
65526583
InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
@@ -6908,6 +6939,22 @@ void Assembler::vroundpd(XMMRegister dst, Address src, int32_t rmode, int vecto
69086939
emit_int8((rmode));
69096940
}
69106941

6942+
void Assembler::vroundsd(XMMRegister dst, XMMRegister src, XMMRegister src2, int32_t rmode) {
6943+
assert(VM_Version::supports_avx(), "");
6944+
assert(rmode <= 0x0f, "rmode 0x%x", rmode);
6945+
InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
6946+
int encode = vex_prefix_and_encode(dst->encoding(), src->encoding(), src2->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
6947+
emit_int24(0x0B, (0xC0 | encode), (rmode));
6948+
}
6949+
6950+
void Assembler::vrndscalesd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int32_t rmode) {
6951+
assert(VM_Version::supports_evex(), "requires EVEX support");
6952+
InstructionAttr attributes(AVX_128bit, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
6953+
attributes.set_is_evex_instruction();
6954+
int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
6955+
emit_int24(0x0B, (0xC0 | encode), (rmode));
6956+
}
6957+
69116958
void Assembler::vrndscalepd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len) {
69126959
assert(VM_Version::supports_evex(), "requires EVEX support");
69136960
InstructionAttr attributes(vector_len, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
@@ -8873,6 +8920,19 @@ void Assembler::vextractf64x4(Address dst, XMMRegister src, uint8_t imm8) {
88738920
emit_int8(imm8 & 0x01);
88748921
}
88758922

8923+
void Assembler::extractps(Register dst, XMMRegister src, uint8_t imm8) {
8924+
assert(VM_Version::supports_sse4_1(), "");
8925+
assert(imm8 <= 0x03, "imm8: %u", imm8);
8926+
InstructionAttr attributes(AVX_128bit, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
8927+
int encode = simd_prefix_and_encode(src, xnoreg, as_XMMRegister(dst->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
8928+
// imm8:
8929+
// 0x00 - extract from bits 31:0
8930+
// 0x01 - extract from bits 63:32
8931+
// 0x02 - extract from bits 95:64
8932+
// 0x03 - extract from bits 127:96
8933+
emit_int24(0x17, (0xC0 | encode), imm8 & 0x03);
8934+
}
8935+
88768936
// duplicate 1-byte integer data from src into programmed locations in dest : requires AVX512BW and AVX512VL
88778937
void Assembler::vpbroadcastb(XMMRegister dst, XMMRegister src, int vector_len) {
88788938
assert(VM_Version::supports_avx2(), "");
@@ -9547,6 +9607,15 @@ void Assembler::evdivpd(XMMRegister dst, KRegister mask, XMMRegister nds, Addres
95479607
emit_operand(dst, src, 0);
95489608
}
95499609

9610+
void Assembler::evdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src, EvexRoundPrefix rmode) {
9611+
assert(VM_Version::supports_evex(), "");
9612+
InstructionAttr attributes(rmode, /* vex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
9613+
attributes.set_extended_context();
9614+
attributes.set_is_evex_instruction();
9615+
int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_F2, VEX_OPCODE_0F, &attributes);
9616+
emit_int16(0x5E, (0xC0 | encode));
9617+
}
9618+
95509619
void Assembler::evpabsb(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len) {
95519620
assert(VM_Version::supports_avx512bw() && (vector_len == AVX_512bit || VM_Version::supports_avx512vl()), "");
95529621
InstructionAttr attributes(vector_len, /* vex_w */ false,/* legacy_mode */ false, /* no_mask_reg */ false,/* uses_vl */ true);

‎src/hotspot/cpu/x86/assembler_x86.hpp‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -528,6 +528,13 @@ class Assembler : public AbstractAssembler {
528528
EVEX_Z = 0x80
529529
};
530530

531+
enum EvexRoundPrefix {
532+
EVEX_RNE = 0x0,
533+
EVEX_RD = 0x1,
534+
EVEX_RU = 0x2,
535+
EVEX_RZ = 0x3
536+
};
537+
531538
enum VexSimdPrefix {
532539
VEX_SIMD_NONE = 0x0,
533540
VEX_SIMD_66 = 0x1,
@@ -886,6 +893,8 @@ class Assembler : public AbstractAssembler {
886893
void movsd(Address dst, XMMRegister src);
887894
void movlpd(XMMRegister dst, Address src);
888895

896+
void vmovsd(XMMRegister dst, XMMRegister src, XMMRegister src2);
897+
889898
// New cpus require use of movaps and movapd to avoid partial register stall
890899
// when moving between registers.
891900
void movaps(XMMRegister dst, XMMRegister src);
@@ -2245,9 +2254,13 @@ class Assembler : public AbstractAssembler {
22452254
void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src);
22462255
void vdivsd(XMMRegister dst, XMMRegister nds, Address src);
22472256
void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2257+
void evdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src, EvexRoundPrefix rmode);
22482258
void vdivss(XMMRegister dst, XMMRegister nds, Address src);
22492259
void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src);
22502260
void vfmadd231sd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2261+
void vfnmadd213sd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2262+
void evfnmadd213sd(XMMRegister dst, XMMRegister nds, XMMRegister src, EvexRoundPrefix rmode);
2263+
void vfnmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2);
22512264
void vfmadd231ss(XMMRegister dst, XMMRegister nds, XMMRegister src);
22522265
void vmulsd(XMMRegister dst, XMMRegister nds, Address src);
22532266
void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
@@ -2337,8 +2350,11 @@ class Assembler : public AbstractAssembler {
23372350
// Round Packed Double precision value.
23382351
void vroundpd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len);
23392352
void vroundpd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
2353+
void vrndscalesd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int32_t rmode);
23402354
void vrndscalepd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len);
23412355
void vrndscalepd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
2356+
void vroundsd(XMMRegister dst, XMMRegister src, XMMRegister src2, int32_t rmode);
2357+
void vroundsd(XMMRegister dst, XMMRegister src, Address src2, int32_t rmode);
23422358

23432359
// Bitwise Logical AND of Packed Floating-Point Values
23442360
void andpd(XMMRegister dst, XMMRegister src);
@@ -2722,6 +2738,8 @@ class Assembler : public AbstractAssembler {
27222738
void vextractf64x4(XMMRegister dst, XMMRegister src, uint8_t imm8);
27232739
void vextractf64x4(Address dst, XMMRegister src, uint8_t imm8);
27242740

2741+
void extractps(Register dst, XMMRegister src, uint8_t imm8);
2742+
27252743
// xmm/mem sourced byte/word/dword/qword replicate
27262744
void vpbroadcastb(XMMRegister dst, XMMRegister src, int vector_len);
27272745
void vpbroadcastb(XMMRegister dst, Address src, int vector_len);
@@ -2955,6 +2973,8 @@ class InstructionAttr {
29552973
_embedded_opmask_register_specifier = mask->encoding() & 0x7;
29562974
}
29572975

2976+
void set_extended_context(void) { _is_extended_context = true; }
2977+
29582978
};
29592979

29602980
#endif // CPU_X86_ASSEMBLER_X86_HPP

‎src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -968,7 +968,7 @@ void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
968968
break;
969969
case vmIntrinsics::_dpow:
970970
if (StubRoutines::dpow() != nullptr) {
971-
__ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
971+
__ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
972972
} else {
973973
__ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
974974
}

‎src/hotspot/cpu/x86/sharedRuntime_x86.cpp‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,8 @@ void SharedRuntime::inline_check_hashcode_from_object_header(MacroAssembler* mas
9595
#if defined(TARGET_COMPILER_gcc) && !defined(_WIN64)
9696
JRT_LEAF(jfloat, SharedRuntime::frem(jfloat x, jfloat y))
9797
jfloat retval;
98+
const bool is_LP64 = LP64_ONLY(true) NOT_LP64(false);
99+
if (!is_LP64 || UseAVX < 1 || !UseFMA) {
98100
asm ("\
99101
1: \n\
100102
fprem \n\
@@ -105,11 +107,21 @@ jne 1b \n\
105107
:"=t"(retval)
106108
:"0"(x), "u"(y)
107109
:"cc", "ax");
110+
} else {
111+
assert(StubRoutines::fmod() != nullptr, "");
112+
jdouble (*addr)(jdouble, jdouble) = (double (*)(double, double))StubRoutines::fmod();
113+
jdouble dx = (jdouble) x;
114+
jdouble dy = (jdouble) y;
115+
116+
retval = (jfloat) (*addr)(dx, dy);
117+
}
108118
return retval;
109119
JRT_END
110120

111121
JRT_LEAF(jdouble, SharedRuntime::drem(jdouble x, jdouble y))
112122
jdouble retval;
123+
const bool is_LP64 = LP64_ONLY(true) NOT_LP64(false);
124+
if (!is_LP64 || UseAVX < 1 || !UseFMA) {
113125
asm ("\
114126
1: \n\
115127
fprem \n\
@@ -120,6 +132,12 @@ jne 1b \n\
120132
:"=t"(retval)
121133
:"0"(x), "u"(y)
122134
:"cc", "ax");
135+
} else {
136+
assert(StubRoutines::fmod() != nullptr, "");
137+
jdouble (*addr)(jdouble, jdouble) = (double (*)(double, double))StubRoutines::fmod();
138+
139+
retval = (*addr)(x, y);
140+
}
123141
return retval;
124142
JRT_END
125143
#endif // TARGET_COMPILER_gcc && !_WIN64

‎src/hotspot/cpu/x86/stubGenerator_x86_64.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4028,6 +4028,10 @@ void StubGenerator::generate_initial_stubs() {
40284028
}
40294029

40304030
generate_libm_stubs();
4031+
4032+
if ((UseAVX >= 1) && (VM_Version::supports_avx512vlbwdq() || VM_Version::supports_fma())) {
4033+
StubRoutines::_fmod = generate_libmFmod(); // from stubGenerator_x86_64_fmod.cpp
4034+
}
40314035
}
40324036

40334037
void StubGenerator::generate_continuation_stubs() {

‎src/hotspot/cpu/x86/stubGenerator_x86_64.hpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -487,6 +487,7 @@ class StubGenerator: public StubCodeGenerator {
487487
address generate_libmPow();
488488
address generate_libmLog();
489489
address generate_libmLog10();
490+
address generate_libmFmod();
490491

491492
// Shared constants
492493
static address ZERO;

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