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8342014: RISC-V: ZStoreBarrierStubC2 clobbers rflags
Reviewed-by: fyang Backport-of: a601cd2
1 parent 46abc06 commit 56fcf0b

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2 files changed

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‎src/hotspot/cpu/riscv/gc/x/x_riscv.ad‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -52,11 +52,11 @@ static void x_load_barrier_slow_path(MacroAssembler* masm, const MachNode* node,
5252
%}
5353

5454
// Load Pointer
55-
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
55+
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
5656
%{
5757
match(Set dst (LoadP mem));
5858
predicate(UseZGC && !ZGenerational && (n->as_Load()->barrier_data() != 0));
59-
effect(TEMP dst, TEMP tmp);
59+
effect(TEMP dst, TEMP tmp, KILL cr);
6060

6161
ins_cost(4 * DEFAULT_COST);
6262

@@ -71,11 +71,11 @@ instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
7171
ins_pipe(iload_reg_mem);
7272
%}
7373

74-
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
74+
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
7575
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
7676
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
7777
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
78-
effect(TEMP_DEF res, TEMP tmp);
78+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
7979

8080
ins_cost(2 * VOLATILE_REF_COST);
8181

@@ -105,11 +105,11 @@ instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newva
105105
ins_pipe(pipe_slow);
106106
%}
107107

108-
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
108+
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
109109
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
110110
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
111111
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() == XLoadBarrierStrong));
112-
effect(TEMP_DEF res, TEMP tmp);
112+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
113113

114114
ins_cost(2 * VOLATILE_REF_COST);
115115

@@ -139,10 +139,10 @@ instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
139139
ins_pipe(pipe_slow);
140140
%}
141141

142-
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
142+
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
143143
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
144144
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
145-
effect(TEMP_DEF res, TEMP tmp);
145+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
146146

147147
ins_cost(2 * VOLATILE_REF_COST);
148148

@@ -167,10 +167,10 @@ instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP n
167167
ins_pipe(pipe_slow);
168168
%}
169169

170-
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
170+
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
171171
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
172172
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
173-
effect(TEMP_DEF res, TEMP tmp);
173+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
174174

175175
ins_cost(2 * VOLATILE_REF_COST);
176176

@@ -195,10 +195,10 @@ instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iReg
195195
ins_pipe(pipe_slow);
196196
%}
197197

198-
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
198+
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
199199
match(Set prev (GetAndSetP mem newv));
200200
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
201-
effect(TEMP_DEF prev, TEMP tmp);
201+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
202202

203203
ins_cost(2 * VOLATILE_REF_COST);
204204

@@ -212,10 +212,10 @@ instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
212212
ins_pipe(pipe_serial);
213213
%}
214214

215-
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
215+
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
216216
match(Set prev (GetAndSetP mem newv));
217217
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() != 0));
218-
effect(TEMP_DEF prev, TEMP tmp);
218+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
219219

220220
ins_cost(VOLATILE_REF_COST);
221221

‎src/hotspot/cpu/riscv/gc/z/z_riscv.ad‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -90,11 +90,11 @@ static void z_store_barrier(MacroAssembler* masm, const MachNode* node, Address
9090
%}
9191

9292
// Load Pointer
93-
instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
93+
instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
9494
%{
9595
match(Set dst (LoadP mem));
9696
predicate(UseZGC && ZGenerational && n->as_Load()->barrier_data() != 0);
97-
effect(TEMP dst, TEMP tmp);
97+
effect(TEMP dst, TEMP tmp, KILL cr);
9898

9999
ins_cost(4 * DEFAULT_COST);
100100

@@ -110,11 +110,11 @@ instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
110110
%}
111111

112112
// Store Pointer
113-
instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2)
113+
instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
114114
%{
115115
predicate(UseZGC && ZGenerational && n->as_Store()->barrier_data() != 0);
116116
match(Set mem (StoreP mem src));
117-
effect(TEMP tmp1, TEMP tmp2);
117+
effect(TEMP tmp1, TEMP tmp2, KILL cr);
118118

119119
ins_cost(125); // XXX
120120
format %{ "sd $mem, $src\t# ptr" %}
@@ -127,11 +127,11 @@ instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2)
127127
%}
128128

129129
instruct zCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval,
130-
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
130+
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
131131
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
132132
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
133133
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
134-
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
134+
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
135135

136136
ins_cost(2 * VOLATILE_REF_COST);
137137

@@ -150,11 +150,11 @@ instruct zCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newva
150150
%}
151151

152152
instruct zCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval,
153-
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
153+
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
154154
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
155155
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
156156
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
157-
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
157+
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
158158

159159
ins_cost(2 * VOLATILE_REF_COST);
160160

@@ -173,10 +173,10 @@ instruct zCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
173173
%}
174174

175175
instruct zCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval,
176-
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
176+
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
177177
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
178178
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
179-
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
179+
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
180180

181181
ins_cost(2 * VOLATILE_REF_COST);
182182

@@ -195,10 +195,10 @@ instruct zCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP n
195195
%}
196196

197197
instruct zCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval,
198-
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
198+
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
199199
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
200200
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
201-
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
201+
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
202202

203203
ins_cost(2 * VOLATILE_REF_COST);
204204

@@ -216,10 +216,10 @@ instruct zCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iReg
216216
ins_pipe(pipe_slow);
217217
%}
218218

219-
instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
219+
instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
220220
match(Set prev (GetAndSetP mem newv));
221221
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
222-
effect(TEMP_DEF prev, TEMP tmp);
222+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
223223

224224
ins_cost(2 * VOLATILE_REF_COST);
225225

@@ -234,10 +234,10 @@ instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
234234
ins_pipe(pipe_serial);
235235
%}
236236

237-
instruct zGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
237+
instruct zGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
238238
match(Set prev (GetAndSetP mem newv));
239239
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
240-
effect(TEMP_DEF prev, TEMP tmp);
240+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
241241

242242
ins_cost(2 * VOLATILE_REF_COST);
243243

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