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kuaiweiRealFYang
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8278337: riscv: remove unnecessary ld/sd zr around calls
Reviewed-by: fyang
1 parent 62c9bc7 commit 1a43775

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2 files changed

+10
-16
lines changed

2 files changed

+10
-16
lines changed

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -953,22 +953,14 @@ void MacroAssembler::pop_reg(Register Rd)
953953
}
954954

955955
int MacroAssembler::bitset_to_regs(unsigned int bitset, unsigned char* regs) {
956-
DEBUG_ONLY(int words_pushed = 0;)
957-
958956
int count = 0;
959-
// Sp is x2, and zr is x0, which should not be pushed.
960-
// If the number of registers is odd, zr is used for stack alignment.Otherwise, it will be ignored.
961-
bitset &= ~ (1U << 2);
962-
bitset |= 0x1;
963-
964957
// Scan bitset to accumulate register pairs
965958
for (int reg = 31; reg >= 0; reg --) {
966959
if ((1U << 31) & bitset) {
967960
regs[count++] = reg;
968961
}
969962
bitset <<= 1;
970963
}
971-
count &= ~1; // Only push an even number of regs
972964
return count;
973965
}
974966

@@ -979,12 +971,14 @@ int MacroAssembler::push_reg(unsigned int bitset, Register stack) {
979971

980972
unsigned char regs[32];
981973
int count = bitset_to_regs(bitset, regs);
974+
// reserve one slot to align for odd count
975+
int offset = is_even(count) ? 0 : wordSize;
982976

983977
if (count) {
984-
addi(stack, stack, - count * wordSize);
978+
addi(stack, stack, - count * wordSize - offset);
985979
}
986980
for (int i = count - 1; i >= 0; i--) {
987-
sd(as_Register(regs[i]), Address(stack, (count -1 - i) * wordSize));
981+
sd(as_Register(regs[i]), Address(stack, (count - 1 - i) * wordSize + offset));
988982
DEBUG_ONLY(words_pushed ++;)
989983
}
990984

@@ -998,14 +992,16 @@ int MacroAssembler::pop_reg(unsigned int bitset, Register stack) {
998992

999993
unsigned char regs[32];
1000994
int count = bitset_to_regs(bitset, regs);
995+
// reserve one slot to align for odd count
996+
int offset = is_even(count) ? 0 : wordSize;
1001997

1002998
for (int i = count - 1; i >= 0; i--) {
1003-
ld(as_Register(regs[i]), Address(stack, (count -1 - i) * wordSize));
999+
ld(as_Register(regs[i]), Address(stack, (count - 1 - i) * wordSize + offset));
10041000
DEBUG_ONLY(words_popped ++;)
10051001
}
10061002

10071003
if (count) {
1008-
addi(stack, stack, count * wordSize);
1004+
addi(stack, stack, count * wordSize + offset);
10091005
}
10101006
assert(words_popped == count, "oops, popped != count");
10111007

src/hotspot/cpu/riscv/riscv.ad

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1171,19 +1171,18 @@ int MachCallRuntimeNode::ret_addr_offset() {
11711171
// jal(addr)
11721172
// or with far branches
11731173
// jal(trampoline_stub)
1174-
// for real runtime callouts it will be six instructions
1174+
// for real runtime callouts it will be five instructions
11751175
// see riscv64_enc_java_to_runtime
11761176
// la(t1, retaddr)
11771177
// la(t0, RuntimeAddress(addr))
11781178
// addi(sp, sp, -2 * wordSize)
1179-
// sd(zr, Address(sp))
11801179
// sd(t1, Address(sp, wordSize))
11811180
// jalr(t0)
11821181
CodeBlob *cb = CodeCache::find_blob(_entry_point);
11831182
if (cb != NULL) {
11841183
return 1 * NativeInstruction::instruction_size;
11851184
} else {
1186-
return 12 * NativeInstruction::instruction_size;
1185+
return 11 * NativeInstruction::instruction_size;
11871186
}
11881187
}
11891188

@@ -2267,7 +2266,6 @@ encode %{
22672266
__ la(t0, RuntimeAddress(entry));
22682267
// Leave a breadcrumb for JavaFrameAnchor::capture_last_Java_pc()
22692268
__ addi(sp, sp, -2 * wordSize);
2270-
__ sd(zr, Address(sp));
22712269
__ sd(t1, Address(sp, wordSize));
22722270
__ jalr(t0);
22732271
__ bind(retaddr);

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