Fix remaining CEXT -> RVC

Author: zhengxiaolinX

src/hotspot/cpu/riscv/assembler_riscv.cpp

@@ -80,7 +80,7 @@ void Assembler::subw(Register Rd, Register Rn, int64_t decrement, Register temp)
 }
 
 void Assembler::li(Register Rd, int64_t imm) {
-  CHECK_CEXT_AND_COMPRESSIBLE(is_imm_in_range(imm, 6, 0) && Rd != x0) {
+  CHECK_RVC_AND_COMPRESSIBLE(is_imm_in_range(imm, 6, 0) && Rd != x0) {
     c_li(Rd, imm);
     return;
   }

src/hotspot/cpu/riscv/assembler_riscv.hpp

@@ -380,7 +380,7 @@ class Assembler : public AbstractAssembler {
   }
 
   void halt() {
-    CHECK_CEXT() {
+    CHECK_RVC() {
       emit_int16(0);
     } else {
       emit_int32(0);

src/hotspot/cpu/riscv/assembler_riscv_c.hpp

@@ -550,21 +550,21 @@
 #define EMIT_MAY_COMPRESS_false(NAME, ...)
 
 #define IS_COMPRESSIBLE(...)                          if (__VA_ARGS__)
-#define CHECK_CEXT_AND_COMPRESSIBLE(...)              IS_COMPRESSIBLE(UseRVC && in_compressible_region() && __VA_ARGS__)
-#define CHECK_CEXT()                                  if (UseRVC && in_compressible_region())
+#define CHECK_RVC_AND_COMPRESSIBLE(...)               IS_COMPRESSIBLE(UseRVC && in_compressible_region() && __VA_ARGS__)
+#define CHECK_RVC()                                   if (UseRVC && in_compressible_region())
 
 // RVC transformation macros
 #define EMIT_RVC_cond(PREFIX, COND, EMIT) {                                            \
     PREFIX                                                                             \
-    CHECK_CEXT_AND_COMPRESSIBLE(COND) {                                                \
+    CHECK_RVC_AND_COMPRESSIBLE(COND) {                                                 \
       EMIT;                                                                            \
       return;                                                                          \
     }                                                                                  \
   }
 
 #define EMIT_RVC_cond2(PREFIX, COND1, EMIT1, COND2, EMIT2) {                           \
     PREFIX                                                                             \
-    CHECK_CEXT() {                                                                     \
+    CHECK_RVC() {                                                                      \
       IS_COMPRESSIBLE(COND1) {                                                         \
         EMIT1;                                                                         \
         return;                                                                        \
@@ -577,7 +577,7 @@
 
 #define EMIT_RVC_cond4(PREFIX, COND1, EMIT1, COND2, EMIT2, COND3, EMIT3, COND4, EMIT4) {  \
     PREFIX                                                                             \
-    CHECK_CEXT() {                                                                     \
+    CHECK_RVC() {                                                                      \
       IS_COMPRESSIBLE(COND1) {                                                         \
         EMIT1;                                                                         \
         return;                                                                        \