Remove nmethod_entry_barrier-related things

Author: zhengxiaolinX

src/hotspot/cpu/riscv/gc/shared/barrierSetAssembler_riscv.cpp

@@ -231,8 +231,6 @@ void BarrierSetAssembler::incr_allocated_bytes(MacroAssembler* masm,
   __ sd(tmp1, Address(xthread, in_bytes(JavaThread::allocated_bytes_offset())));
 }
 
-extern int nmethod_barrier_guard_offset();
-
 void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm) {
   BarrierSetNMethod* bs_nm = BarrierSet::barrier_set()->barrier_set_nmethod();
 
@@ -242,7 +240,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm) {
 
   // RVC: RISCV's amoswap instructions need an alignment for the memory address it swaps
   //   when we reach here we may get a 2-byte alignment so need to align it
-  __ align(4, nmethod_barrier_guard_offset());
+  __ align(4);
 
   Label skip, guard;
   Address thread_disarmed_addr(xthread, in_bytes(bs_nm->thread_disarmed_offset()));

src/hotspot/cpu/riscv/gc/shared/barrierSetNMethod_riscv.cpp

@@ -36,18 +36,11 @@
 #include "utilities/debug.hpp"
 
 class NativeNMethodBarrier: public NativeInstruction {
-public:
-  enum {
-    guard_offset   = 12 * instruction_size,
-    barrier_size   = guard_offset + 4,  // guard_offset + an int32 nmethod guard value
-  };
-
-private:
   address instruction_address() const { return addr_at(0); }
 
   int *guard_addr() {
     /* auipc + lwu + fence + lwu + beq + lui + addi + slli + addi + slli + jalr + j */
-    return reinterpret_cast<int*>(instruction_address() + guard_offset);
+    return reinterpret_cast<int*>(instruction_address() + 12 * 4);
   }
 
 public:
@@ -62,10 +55,6 @@ class NativeNMethodBarrier: public NativeInstruction {
   void verify() const;
 };
 
-int nmethod_barrier_guard_offset() {
-  return NativeNMethodBarrier::guard_offset;
-}
-
 // Store the instruction bitmask, bits and name for checking the barrier.
 struct CheckInsn {
   uint32_t mask;
@@ -152,7 +141,7 @@ void BarrierSetNMethod::deoptimize(nmethod* nm, address* return_address_ptr) {
 
 // see BarrierSetAssembler::nmethod_entry_barrier
 // auipc + lwu + fence + lwu + beq + movptr_with_offset(5 instructions) + jalr + j + int32
-static const int entry_barrier_offset = - NativeNMethodBarrier::barrier_size;
+static const int entry_barrier_offset = -4 * 13;
 
 static NativeNMethodBarrier* native_nmethod_barrier(nmethod* nm) {
   address barrier_address = nm->code_begin() + nm->frame_complete_offset() + entry_barrier_offset;