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1 parent 4d82d77 commit 355bd2cCopy full SHA for 355bd2c
ports/stm32/spi.c
@@ -598,7 +598,14 @@ static HAL_StatusTypeDef spi_wait_dma_finished(const spi_t *spi, uint32_t t_star
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enable_irq(irq_state);
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return HAL_OK;
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}
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+ // See DM00257543 2.2.5
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+ // The DTCM-RAM is not accessible in read during Sleep mode (when the CPU clock is
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+ // gated). When a read access to the DTCM-RAM is performed by an AHB bus master
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+ // (that are the DMAs) while the CPU is in sleep mode (CPU clock is gated), the
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+ // data is not transmitted to the AHB bus and the AHB master reads 0x0000_0000.
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+ #if !defined(STM32F7)
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__WFI();
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+ #endif
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if (HAL_GetTick() - t_start >= timeout) {
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return HAL_TIMEOUT;
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