target: cortex_a: fix clang error core.CallAndMessage

Clang complains about the variable 'orig_dfsr' that can be used
uninitialized both in cortex_a_read_cpu_memory() and in
cortex_a_write_cpu_memory().

The issue is caused by an incorrect error path that used to jump
through 'goto out'. The code after the label 'out' is specific to
handle the case of an error during memory R/W; it is incorrect to
jump there to handle an error during the initialization that
precedes the memory R/W.

Replace the 'goto out' with 'return retval'.
Remove the label 'out' that is now unused.

Change-Id: Ib4b140221d1c1b63419de109579bde8b63fc2e8c
Signed-off-by: Antonio Borneo <[email protected]>
Reviewed-on: https://review.openocd.org/c/openocd/+/7393
Tested-by: jenkins

Author: borneoa

src/target/cortex_a.c

@@ -2246,24 +2246,24 @@ static int cortex_a_write_cpu_memory(struct target *target,
 	/* Switch to non-blocking mode if not already in that mode. */
 	retval = cortex_a_set_dcc_mode(target, DSCR_EXT_DCC_NON_BLOCKING, &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	/* Mark R0 as dirty. */
 	arm_reg_current(arm, 0)->dirty = true;
 
 	/* Read DFAR and DFSR, as they will be modified in the event of a fault. */
 	retval = cortex_a_read_dfar_dfsr(target, &orig_dfar, &orig_dfsr, &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	/* Get the memory address into R0. */
 	retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
 			armv7a->debug_base + CPUDBG_DTRRX, address);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 	retval = cortex_a_exec_opcode(target, ARMV4_5_MRC(14, 0, 0, 0, 5, 0), &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	if (size == 4 && (address % 4) == 0) {
 		/* We are doing a word-aligned transfer, so use fast mode. */
@@ -2288,7 +2288,6 @@ static int cortex_a_write_cpu_memory(struct target *target,
 		retval = cortex_a_write_cpu_memory_slow(target, size, count, buffer, &dscr);
 	}
 
-out:
 	final_retval = retval;
 
 	/* Switch to non-blocking mode if not already in that mode. */
@@ -2564,24 +2563,24 @@ static int cortex_a_read_cpu_memory(struct target *target,
 	/* Switch to non-blocking mode if not already in that mode. */
 	retval = cortex_a_set_dcc_mode(target, DSCR_EXT_DCC_NON_BLOCKING, &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	/* Mark R0 as dirty. */
 	arm_reg_current(arm, 0)->dirty = true;
 
 	/* Read DFAR and DFSR, as they will be modified in the event of a fault. */
 	retval = cortex_a_read_dfar_dfsr(target, &orig_dfar, &orig_dfsr, &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	/* Get the memory address into R0. */
 	retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
 			armv7a->debug_base + CPUDBG_DTRRX, address);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 	retval = cortex_a_exec_opcode(target, ARMV4_5_MRC(14, 0, 0, 0, 5, 0), &dscr);
 	if (retval != ERROR_OK)
-		goto out;
+		return retval;
 
 	if (size == 4 && (address % 4) == 0) {
 		/* We are doing a word-aligned transfer, so use fast mode. */
@@ -2607,7 +2606,6 @@ static int cortex_a_read_cpu_memory(struct target *target,
 		retval = cortex_a_read_cpu_memory_slow(target, size, count, buffer, &dscr);
 	}
 
-out:
 	final_retval = retval;
 
 	/* Switch to non-blocking mode if not already in that mode. */