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| 1 | +/** |
| 2 | + * Copyright (C) 2021, Mate Kukri <[email protected]> |
| 3 | + * Based on "pico-serprog" by Thomas Roth <[email protected]> |
| 4 | + * |
| 5 | + * Licensed under GPLv3 |
| 6 | + * |
| 7 | + * Also based on stm32-vserprog: |
| 8 | + * https://github.com/dword1511/stm32-vserprog |
| 9 | + * |
| 10 | + */ |
| 11 | + |
| 12 | +#include "pico/stdlib.h" |
| 13 | +#include "hardware/spi.h" |
| 14 | +#include "tusb.h" |
| 15 | +#include "serprog.h" |
| 16 | + |
| 17 | +#define CDC_ITF 0 // USB CDC interface no |
| 18 | + |
| 19 | +#define SPI_IF spi0 // Which PL022 to use |
| 20 | +#define SPI_BAUD 12000000 // Default baudrate (12 MHz) |
| 21 | +#define SPI_CS 5 |
| 22 | +#define SPI_MISO 4 |
| 23 | +#define SPI_MOSI 3 |
| 24 | +#define SPI_SCK 2 |
| 25 | + |
| 26 | +static void enable_spi(uint baud) |
| 27 | +{ |
| 28 | + // Setup chip select GPIO |
| 29 | + gpio_init(SPI_CS); |
| 30 | + gpio_put(SPI_CS, 1); |
| 31 | + gpio_set_dir(SPI_CS, GPIO_OUT); |
| 32 | + |
| 33 | + // Setup PL022 |
| 34 | + spi_init(SPI_IF, baud); |
| 35 | + gpio_set_function(SPI_MISO, GPIO_FUNC_SPI); |
| 36 | + gpio_set_function(SPI_MOSI, GPIO_FUNC_SPI); |
| 37 | + gpio_set_function(SPI_SCK, GPIO_FUNC_SPI); |
| 38 | +} |
| 39 | + |
| 40 | +static void disable_spi() |
| 41 | +{ |
| 42 | + // Set all pins to SIO inputs |
| 43 | + gpio_init(SPI_CS); |
| 44 | + gpio_init(SPI_MISO); |
| 45 | + gpio_init(SPI_MOSI); |
| 46 | + gpio_init(SPI_SCK); |
| 47 | + |
| 48 | + // Disable all pulls |
| 49 | + gpio_set_pulls(SPI_CS, 0, 0); |
| 50 | + gpio_set_pulls(SPI_MISO, 0, 0); |
| 51 | + gpio_set_pulls(SPI_MOSI, 0, 0); |
| 52 | + gpio_set_pulls(SPI_SCK, 0, 0); |
| 53 | + |
| 54 | + // Disable SPI peripheral |
| 55 | + spi_deinit(SPI_IF); |
| 56 | +} |
| 57 | + |
| 58 | +static inline void cs_select(uint cs_pin) |
| 59 | +{ |
| 60 | + asm volatile("nop \n nop \n nop"); // FIXME |
| 61 | + gpio_put(cs_pin, 0); |
| 62 | + asm volatile("nop \n nop \n nop"); // FIXME |
| 63 | +} |
| 64 | + |
| 65 | +static inline void cs_deselect(uint cs_pin) |
| 66 | +{ |
| 67 | + asm volatile("nop \n nop \n nop"); // FIXME |
| 68 | + gpio_put(cs_pin, 1); |
| 69 | + asm volatile("nop \n nop \n nop"); // FIXME |
| 70 | +} |
| 71 | + |
| 72 | +static void wait_for_read(void) |
| 73 | +{ |
| 74 | + do |
| 75 | + tud_task(); |
| 76 | + while (!tud_cdc_n_available(CDC_ITF)); |
| 77 | +} |
| 78 | + |
| 79 | +static inline void readbytes_blocking(void *b, uint32_t len) |
| 80 | +{ |
| 81 | + while (len) { |
| 82 | + wait_for_read(); |
| 83 | + uint32_t r = tud_cdc_n_read(CDC_ITF, b, len); |
| 84 | + b += r; |
| 85 | + len -= r; |
| 86 | + } |
| 87 | +} |
| 88 | + |
| 89 | +static inline uint8_t readbyte_blocking(void) |
| 90 | +{ |
| 91 | + wait_for_read(); |
| 92 | + uint8_t b; |
| 93 | + tud_cdc_n_read(CDC_ITF, &b, 1); |
| 94 | + return b; |
| 95 | +} |
| 96 | + |
| 97 | +static void wait_for_write(void) |
| 98 | +{ |
| 99 | + do { |
| 100 | + tud_task(); |
| 101 | + } while (!tud_cdc_n_write_available(CDC_ITF)); |
| 102 | +} |
| 103 | + |
| 104 | +static inline void sendbytes_blocking(const void *b, uint32_t len) |
| 105 | +{ |
| 106 | + while (len) { |
| 107 | + wait_for_write(); |
| 108 | + uint32_t w = tud_cdc_n_write(CDC_ITF, b, len); |
| 109 | + b += w; |
| 110 | + len -= w; |
| 111 | + } |
| 112 | +} |
| 113 | + |
| 114 | +static inline void sendbyte_blocking(uint8_t b) |
| 115 | +{ |
| 116 | + wait_for_write(); |
| 117 | + tud_cdc_n_write(CDC_ITF, &b, 1); |
| 118 | +} |
| 119 | + |
| 120 | +static void command_loop(void) |
| 121 | +{ |
| 122 | + uint baud = spi_get_baudrate(SPI_IF); |
| 123 | + |
| 124 | + for (;;) { |
| 125 | + switch (readbyte_blocking()) { |
| 126 | + case S_CMD_NOP: |
| 127 | + sendbyte_blocking(S_ACK); |
| 128 | + break; |
| 129 | + case S_CMD_Q_IFACE: |
| 130 | + sendbyte_blocking(S_ACK); |
| 131 | + sendbyte_blocking(0x01); |
| 132 | + sendbyte_blocking(0x00); |
| 133 | + break; |
| 134 | + case S_CMD_Q_CMDMAP: |
| 135 | + { |
| 136 | + static const uint32_t cmdmap[8] = { |
| 137 | + (1 << S_CMD_NOP) | |
| 138 | + (1 << S_CMD_Q_IFACE) | |
| 139 | + (1 << S_CMD_Q_CMDMAP) | |
| 140 | + (1 << S_CMD_Q_PGMNAME) | |
| 141 | + (1 << S_CMD_Q_SERBUF) | |
| 142 | + (1 << S_CMD_Q_BUSTYPE) | |
| 143 | + (1 << S_CMD_SYNCNOP) | |
| 144 | + (1 << S_CMD_O_SPIOP) | |
| 145 | + (1 << S_CMD_S_BUSTYPE) | |
| 146 | + (1 << S_CMD_S_SPI_FREQ)| |
| 147 | + (1 << S_CMD_S_PIN_STATE) |
| 148 | + }; |
| 149 | + |
| 150 | + sendbyte_blocking(S_ACK); |
| 151 | + sendbytes_blocking((uint8_t *) cmdmap, sizeof cmdmap); |
| 152 | + break; |
| 153 | + } |
| 154 | + case S_CMD_Q_PGMNAME: |
| 155 | + { |
| 156 | + static const char progname[16] = "pico-serprog"; |
| 157 | + |
| 158 | + sendbyte_blocking(S_ACK); |
| 159 | + sendbytes_blocking(progname, sizeof progname); |
| 160 | + break; |
| 161 | + } |
| 162 | + case S_CMD_Q_SERBUF: |
| 163 | + sendbyte_blocking(S_ACK); |
| 164 | + sendbyte_blocking(0xFF); |
| 165 | + sendbyte_blocking(0xFF); |
| 166 | + break; |
| 167 | + case S_CMD_Q_BUSTYPE: |
| 168 | + sendbyte_blocking(S_ACK); |
| 169 | + sendbyte_blocking((1 << 3)); // BUS_SPI |
| 170 | + break; |
| 171 | + case S_CMD_SYNCNOP: |
| 172 | + sendbyte_blocking(S_NAK); |
| 173 | + sendbyte_blocking(S_ACK); |
| 174 | + break; |
| 175 | + case S_CMD_S_BUSTYPE: |
| 176 | + // If SPI is among the requsted bus types we succeed, fail otherwise |
| 177 | + if((uint8_t) readbyte_blocking() & (1 << 3)) |
| 178 | + sendbyte_blocking(S_ACK); |
| 179 | + else |
| 180 | + sendbyte_blocking(S_NAK); |
| 181 | + break; |
| 182 | + case S_CMD_O_SPIOP: |
| 183 | + { |
| 184 | + static uint8_t buf[4096]; |
| 185 | + |
| 186 | + uint32_t wlen = 0; |
| 187 | + readbytes_blocking(&wlen, 3); |
| 188 | + uint32_t rlen = 0; |
| 189 | + readbytes_blocking(&rlen, 3); |
| 190 | + |
| 191 | + cs_select(SPI_CS); |
| 192 | + |
| 193 | + while (wlen) { |
| 194 | + uint32_t cur = MIN(wlen, sizeof buf); |
| 195 | + readbytes_blocking(buf, cur); |
| 196 | + spi_write_blocking(SPI_IF, buf, cur); |
| 197 | + wlen -= cur; |
| 198 | + } |
| 199 | + |
| 200 | + sendbyte_blocking(S_ACK); |
| 201 | + |
| 202 | + while (rlen) { |
| 203 | + uint32_t cur = MIN(rlen, sizeof buf); |
| 204 | + spi_read_blocking(SPI_IF, 0, buf, cur); |
| 205 | + sendbytes_blocking(buf, cur); |
| 206 | + rlen -= cur; |
| 207 | + } |
| 208 | + |
| 209 | + cs_deselect(SPI_CS); |
| 210 | + } |
| 211 | + break; |
| 212 | + case S_CMD_S_SPI_FREQ: |
| 213 | + { |
| 214 | + uint32_t want_baud; |
| 215 | + readbytes_blocking(&want_baud, 4); |
| 216 | + if (want_baud) { |
| 217 | + // Set frequence |
| 218 | + baud = spi_set_baudrate(SPI_IF, want_baud); |
| 219 | + // Send back actual value |
| 220 | + sendbyte_blocking(S_ACK); |
| 221 | + sendbytes_blocking(&baud, 4); |
| 222 | + } else { |
| 223 | + // 0 Hz is reserved |
| 224 | + sendbyte_blocking(S_NAK); |
| 225 | + } |
| 226 | + break; |
| 227 | + } |
| 228 | + case S_CMD_S_PIN_STATE: |
| 229 | + if (readbyte_blocking()) |
| 230 | + enable_spi(baud); |
| 231 | + else |
| 232 | + disable_spi(); |
| 233 | + sendbyte_blocking(S_ACK); |
| 234 | + break; |
| 235 | + default: |
| 236 | + sendbyte_blocking(S_NAK); |
| 237 | + break; |
| 238 | + } |
| 239 | + |
| 240 | + tud_cdc_n_write_flush(CDC_ITF); |
| 241 | + } |
| 242 | +} |
| 243 | + |
| 244 | +int main() |
| 245 | +{ |
| 246 | + // Setup USB |
| 247 | + tusb_init(); |
| 248 | + // Setup PL022 SPI |
| 249 | + enable_spi(SPI_BAUD); |
| 250 | + |
| 251 | + command_loop(); |
| 252 | +} |
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