fix test

Author: unconst

pallets/subtensor/src/coinbase/root.rs

@@ -722,6 +722,10 @@ impl<T: Config> Pallet<T> {
         Self::deposit_event(Event::NetworkLockCostReductionIntervalSet(interval));
     }
     pub fn get_lock_reduction_interval() -> u64 {
-        NetworkLockReductionInterval::<T>::get()
+        let interval: I64F64 = I64F64::saturating_from_num( NetworkLockReductionInterval::<T>::get() );
+        let block_emission: I64F64 = I64F64::saturating_from_num( Self::get_block_emission().unwrap_or( 1_000_000_000 ) ); 
+        let halving: I64F64 = block_emission.checked_div( I64F64::saturating_from_num( 1_000_000_000 ) ).unwrap_or( I64F64::saturating_from_num(0.0) );
+        let halved_interval: I64F64 = interval.saturating_mul( halving );
+        halved_interval.saturating_to_num::<u64>()
     }
 }

pallets/subtensor/src/tests/coinbase.rs

@@ -704,9 +704,9 @@ fn test_drain_base_with_subnet_with_two_stakers_registered_and_root_different_am
         let root_after2 = SubtensorModule::get_stake_for_hotkey_and_coldkey_on_subnet(
             &hotkey2, &coldkey, root,
         );
-        let expected_stake = I96F32::from_num(stake_before) + I96F32::from_num(pending_alpha) * I96F32::from_num(3/5);
+        let expected_stake = I96F32::from_num(stake_before) + I96F32::from_num(pending_alpha) * I96F32::from_num(3.0/5.0);
         close(expected_stake.to_num::<u64>(), stake_after1, 10); // Registered gets 60% of emission
-        let expected_stake2 = I96F32::from_num(stake_before) + I96F32::from_num(pending_alpha) * I96F32::from_num(2/5);
+        let expected_stake2 = I96F32::from_num(stake_before) + I96F32::from_num(pending_alpha) * I96F32::from_num(2.0/5.0);
         close(expected_stake2.to_num::<u64>(), stake_after2, 10); // Registered gets 40% emission
         let expected_root1 = I96F32::from_num(2 * stake_before) + I96F32::from_num(pending_tao) * I96F32::from_num(2.0/3.0);
         close(expected_root1.to_num::<u64>(), root_after1, 10); // Registered gets 2/3 tao emission