diff --git a/src/ucs/arch/cpu.c b/src/ucs/arch/cpu.c
index 6fe5e31dba3..5adab9b4c6b 100644
--- a/src/ucs/arch/cpu.c
+++ b/src/ucs/arch/cpu.c
@@ -178,26 +178,27 @@ const char *ucs_cpu_vendor_name()
 const char *ucs_cpu_model_name()
 {
     static const char *cpu_model_names[] = {
-        [UCS_CPU_MODEL_UNKNOWN]            = UCS_VALUE_UNKNOWN_STR,
-        [UCS_CPU_MODEL_INTEL_IVYBRIDGE]    = "IvyBridge",
-        [UCS_CPU_MODEL_INTEL_SANDYBRIDGE]  = "SandyBridge",
-        [UCS_CPU_MODEL_INTEL_NEHALEM]      = "Nehalem",
-        [UCS_CPU_MODEL_INTEL_WESTMERE]     = "Westmere",
-        [UCS_CPU_MODEL_INTEL_HASWELL]      = "Haswell",
-        [UCS_CPU_MODEL_INTEL_BROADWELL]    = "Broadwell",
-        [UCS_CPU_MODEL_INTEL_SKYLAKE]      = "Skylake",
-        [UCS_CPU_MODEL_INTEL_ICELAKE]      = "Icelake",
-        [UCS_CPU_MODEL_ARM_AARCH64]        = "ARM 64-bit",
-        [UCS_CPU_MODEL_AMD_NAPLES]         = "Naples",
-        [UCS_CPU_MODEL_AMD_ROME]           = "Rome",
-        [UCS_CPU_MODEL_AMD_MILAN]          = "Milan",
-        [UCS_CPU_MODEL_AMD_GENOA]          = "Genoa",
-        [UCS_CPU_MODEL_AMD_TURIN]          = "Turin",
-        [UCS_CPU_MODEL_ZHAOXIN_ZHANGJIANG] = "Zhangjiang",
-        [UCS_CPU_MODEL_ZHAOXIN_WUDAOKOU]   = "Wudaokou",
-        [UCS_CPU_MODEL_ZHAOXIN_LUJIAZUI]   = "Lujiazui",
-        [UCS_CPU_MODEL_RV64G]              = "RV64G",
-        [UCS_CPU_MODEL_NVIDIA_GRACE]       = "Grace"
+        [UCS_CPU_MODEL_UNKNOWN]              = UCS_VALUE_UNKNOWN_STR,
+        [UCS_CPU_MODEL_INTEL_IVYBRIDGE]      = "IvyBridge",
+        [UCS_CPU_MODEL_INTEL_SANDYBRIDGE]    = "SandyBridge",
+        [UCS_CPU_MODEL_INTEL_NEHALEM]        = "Nehalem",
+        [UCS_CPU_MODEL_INTEL_WESTMERE]       = "Westmere",
+        [UCS_CPU_MODEL_INTEL_HASWELL]        = "Haswell",
+        [UCS_CPU_MODEL_INTEL_BROADWELL]      = "Broadwell",
+        [UCS_CPU_MODEL_INTEL_SKYLAKE]        = "Skylake",
+        [UCS_CPU_MODEL_INTEL_ICELAKE]        = "Icelake",
+        [UCS_CPU_MODEL_INTEL_EMERALD_RAPIDS] = "Emerald Rapids",
+        [UCS_CPU_MODEL_ARM_AARCH64]          = "ARM 64-bit",
+        [UCS_CPU_MODEL_AMD_NAPLES]           = "Naples",
+        [UCS_CPU_MODEL_AMD_ROME]             = "Rome",
+        [UCS_CPU_MODEL_AMD_MILAN]            = "Milan",
+        [UCS_CPU_MODEL_AMD_GENOA]            = "Genoa",
+        [UCS_CPU_MODEL_AMD_TURIN]            = "Turin",
+        [UCS_CPU_MODEL_ZHAOXIN_ZHANGJIANG]   = "Zhangjiang",
+        [UCS_CPU_MODEL_ZHAOXIN_WUDAOKOU]     = "Wudaokou",
+        [UCS_CPU_MODEL_ZHAOXIN_LUJIAZUI]     = "Lujiazui",
+        [UCS_CPU_MODEL_RV64G]                = "RV64G",
+        [UCS_CPU_MODEL_NVIDIA_GRACE]         = "Grace"
     };
 
     return cpu_model_names[ucs_arch_get_cpu_model()];
diff --git a/src/ucs/arch/cpu.h b/src/ucs/arch/cpu.h
index f75fc32f5be..540a884e7da 100644
--- a/src/ucs/arch/cpu.h
+++ b/src/ucs/arch/cpu.h
@@ -32,6 +32,7 @@ typedef enum ucs_cpu_model {
     UCS_CPU_MODEL_INTEL_BROADWELL,
     UCS_CPU_MODEL_INTEL_SKYLAKE,
     UCS_CPU_MODEL_INTEL_ICELAKE,
+    UCS_CPU_MODEL_INTEL_EMERALD_RAPIDS,
     UCS_CPU_MODEL_ARM_AARCH64,
     UCS_CPU_MODEL_AMD_NAPLES,
     UCS_CPU_MODEL_AMD_ROME,
@@ -166,7 +167,9 @@ static inline int ucs_cpu_prefer_relaxed_order()
              (cpu_model == UCS_CPU_MODEL_AMD_ROME) ||
              (cpu_model == UCS_CPU_MODEL_AMD_MILAN) ||
              (cpu_model == UCS_CPU_MODEL_AMD_GENOA) ||
-             (cpu_model == UCS_CPU_MODEL_AMD_TURIN)));
+             (cpu_model == UCS_CPU_MODEL_AMD_TURIN))) ||
+           ((cpu_vendor == UCS_CPU_VENDOR_INTEL) &&
+            (cpu_model == UCS_CPU_MODEL_INTEL_EMERALD_RAPIDS));
 }
 
 
diff --git a/src/ucs/arch/x86_64/cpu.c b/src/ucs/arch/x86_64/cpu.c
index 7894861e69c..d8ba0913be1 100644
--- a/src/ucs/arch/x86_64/cpu.c
+++ b/src/ucs/arch/x86_64/cpu.c
@@ -459,6 +459,9 @@ ucs_cpu_model_t ucs_arch_get_cpu_model()
             case 0x7e:
                 cpu_model = UCS_CPU_MODEL_INTEL_ICELAKE;
                 break;
+            case 0xcf:
+                cpu_model = UCS_CPU_MODEL_INTEL_EMERALD_RAPIDS;
+                break;
             }
             break;
         /* AMD Zen2 */