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‎docs/specs/ISA.md‎

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@@ -6,7 +6,7 @@ This specification describes the overall architecture and default VM extensions
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- [RV32IM](#rv32im-extension): An extension supporting the 32-bit RISC-V ISA with multiplication.
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- [Native](#native-extension): An extension supporting native field arithmetic for proof recursion and aggregation.
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- [Keccak-256](#keccak-extension): An extension implementing the Keccak-256 hash function compatibly with RISC-V memory.
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- [SHA2-256](#sha2-256-extension): An extension implementing the SHA2-256 hash function compatibly with RISC-V memory.
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- [SHA2](#sha2-extension): An extension implementing the SHA-256, SHA-512, and SHA-384 hash functions compatibly with RISC-V memory.
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- [BigInt](#bigint-extension): An extension supporting 256-bit signed and unsigned integer arithmetic, including
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multiplication. This extension respects the RISC-V memory format.
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- [Algebra](#algebra-extension): An extension supporting modular arithmetic over arbitrary fields and their complex
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| -------------- | ----------- | ----------------------------------------------------------------------------------------------------------------- |
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| KECCAK256_RV32 | `a,b,c,1,2` | `[r32{0}(a):32]_2 = keccak256([r32{0}(b)..r32{0}(b)+r32{0}(c)]_2)`. Performs memory accesses with block size `4`. |
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### SHA2-256 Extension
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### SHA-2 Extension
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The SHA2-256 extension supports the SHA2-256 hash function. The extension operates on address spaces `1` and `2`,
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The SHA-2 extension supports the SHA-256 and SHA-512 hash functions. The extension operates on address spaces `1` and `2`,
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meaning all memory cells are constrained to be bytes.
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| Name | Operands | Description |
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| ----------- | ----------- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------ |
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| SHA256_RV32 | `a,b,c,1,2` | `[r32{0}(a):32]_2 = sha256([r32{0}(b)..r32{0}(b)+r32{0}(c)]_2)`. Does the necessary padding. Performs memory reads with block size `16` and writes with block size `32`. |
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| SHA512_RV32 | `a,b,c,1,2` | `[r32{0}(a):64]_2 = sha512([r32{0}(b)..r32{0}(b)+r32{0}(c)]_2)`. Does the necessary padding. Performs memory reads with block size `16` and writes with block size `32`. |
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| SHA384_RV32 | `a,b,c,1,2` | `[r32{0}(a):64]_2 = sha384([r32{0}(b)..r32{0}(b)+r32{0}(c)]_2)`. Does the necessary padding. Performs memory reads with block size `16` and writes with block size `32`. Writes 64 bytes to memory: the first 48 are the SHA-384 digest and the last 16 are zeros. |
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### BigInt Extension
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‎docs/specs/RISCV.md‎

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- [RV32IM](#rv32im-extension): An extension supporting the 32-bit RISC-V ISA with multiplication.
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- [Keccak-256](#keccak-extension): An extension implementing the Keccak-256 hash function compatibly with RISC-V memory.
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- [SHA2-256](#sha2-256-extension): An extension implementing the SHA2-256 hash function compatibly with RISC-V memory.
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- [SHA2](#sha2-extension): An extension implementing the SHA-256, SHA-512, and SHA-384 hash functions compatibly with RISC-V memory.
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- [BigInt](#bigint-extension): An extension supporting 256-bit signed and unsigned integer arithmetic, including multiplication. This extension respects the RISC-V memory format.
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- [Algebra](#algebra-extension): An extension supporting modular arithmetic over arbitrary fields and their complex field extensions. This extension respects the RISC-V memory format.
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- [Elliptic curve](#elliptic-curve-extension): An extension for elliptic curve operations over Weierstrass curves, including addition and doubling. This can be used to implement multi-scalar multiplication and ECDSA scalar multiplication. This extension respects the RISC-V memory format.
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| ----------- | --- | ----------- | ------ | ------ | ------------------------------------------- |
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| keccak256 | R | 0001011 | 100 | 0x0 | `[rd:32]_2 = keccak256([rs1..rs1 + rs2]_2)` |
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## SHA2-256 Extension
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## SHA-2 Extension
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| RISC-V Inst | FMT | opcode[6:0] | funct3 | funct7 | RISC-V description and notes |
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| ----------- | --- | ----------- | ------ | ------ | ---------------------------------------- |
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| sha256 | R | 0001011 | 100 | 0x1 | `[rd:32]_2 = sha256([rs1..rs1 + rs2]_2)` |
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| sha512 | R | 0001011 | 100 | 0x2 | `[rd:64]_2 = sha512([rs1..rs1 + rs2]_2)` |
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| sha384 | R | 0001011 | 100 | 0x3 | `[rd:64]_2 = sha384([rs1..rs1 + rs2]_2)`. Last 16 bytes will be set to zeros. |
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## BigInt Extension
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‎docs/specs/circuit.md‎

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| FriReducedOpeningChip | – | – | Case 1. |
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| NativePoseidon2Chip | – | – | Case 1. |
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| Rv32HintStoreChip | – | – | Case 1. |
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| Sha256VmChip | – | – | Case 1. |
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| Sha2VmChip | – | – | Case 1. |
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The PhantomChip satisfies the condition because `1 < 3`.
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‎docs/specs/isa-table.md‎

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| ------------- | ---------- | ------------- |
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| Keccak | `Rv32KeccakOpcode::KECCAK256` | KECCAK256_RV32 |
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## SHA2-256 Extension
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## SHA-2 Extension
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#### Instructions
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| VM Extension | `LocalOpcode` | ISA Instruction |
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| ------------- | ---------- | ------------- |
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| SHA2-256 | `Rv32Sha256Opcode::SHA256` | SHA256_RV32 |
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| SHA-2 | `Rv32Sha2Opcode::SHA256` | SHA256_RV32 |
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| SHA-2 | `Rv32Sha2Opcode::SHA512` | SHA512_RV32 |
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| SHA-2 | `Rv32Sha2Opcode::SHA384` | SHA384_RV32 |
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## BigInt Extension
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‎docs/specs/transpiler.md‎

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| ----------- | -------------------------------------------------- |
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| keccak256 | KECCAK256_RV32 `ind(rd), ind(rs1), ind(rs2), 1, 2` |
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### SHA2-256 Extension
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### SHA-2 Extension
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| RISC-V Inst | OpenVM Instruction |
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| ----------- | ----------------------------------------------- |
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| sha256 | SHA256_RV32 `ind(rd), ind(rs1), ind(rs2), 1, 2` |
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| sha512 | SHA512_RV32 `ind(rd), ind(rs1), ind(rs2), 1, 2` |
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| sha384 | SHA384_RV32 `ind(rd), ind(rs1), ind(rs2), 1, 2` |
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### BigInt Extension
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