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chore: rename JalLuiCoreRecord for consistency (#1951)
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  • extensions/rv32im/circuit/src/jal_lui

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extensions/rv32im/circuit/src/jal_lui/core.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -148,7 +148,7 @@ where
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#[repr(C)]
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#[derive(AlignedBytesBorrow, Debug)]
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pub struct Rv32JalLuiRecord {
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pub struct Rv32JalLuiCoreRecord {
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pub imm: u32,
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pub rd_data: [u8; RV32_REGISTER_NUM_LIMBS],
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pub is_jal: bool,
@@ -173,7 +173,7 @@ where
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for<'buf> RA: RecordArena<
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'buf,
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EmptyAdapterCoreLayout<F, A>,
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(A::RecordMut<'buf>, &'buf mut Rv32JalLuiRecord),
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(A::RecordMut<'buf>, &'buf mut Rv32JalLuiCoreRecord),
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>,
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{
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fn get_opcode_name(&self, opcode: usize) -> String {
@@ -220,7 +220,7 @@ where
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fn fill_trace_row(&self, mem_helper: &MemoryAuxColsFactory<F>, row_slice: &mut [F]) {
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let (adapter_row, mut core_row) = unsafe { row_slice.split_at_mut_unchecked(A::WIDTH) };
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self.adapter.fill_trace_row(mem_helper, adapter_row);
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let record: &Rv32JalLuiRecord = unsafe { get_record_from_slice(&mut core_row, ()) };
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let record: &Rv32JalLuiCoreRecord = unsafe { get_record_from_slice(&mut core_row, ()) };
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let core_row: &mut Rv32JalLuiCoreCols<F> = core_row.borrow_mut();
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for pair in record.rd_data.chunks_exact(2) {

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