Skip to content

Commit 823caad

Browse files
breeze303breeze303
committed
qualcommax:fix JDCloud RE-CS-03
1 parent 1341faa commit 823caad

File tree

3 files changed

+176
-234
lines changed

3 files changed

+176
-234
lines changed

‎target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-512m.dtsi‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
// SPDX-License-Identifier: GPL-2.0-only
2+
3+
#include "ipq5018.dtsi"
4+
/ {
5+
reserved-memory {
6+
nss@40000000 {
7+
no-map;
8+
reg = <0x0 0x40000000 0x0 0x01000000>;
9+
};
10+
11+
bt_region: bt@7000000 {
12+
no-map;
13+
reg = <0x0 0x07000000 0x0 0x58000>;
14+
};
15+
};
16+
};
17+
18+
&tz_region {
19+
reg = <0x0 0x4ac00000 0x0 0x00400000>;
20+
};

‎target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-nss.dtsi‎

Lines changed: 59 additions & 133 deletions
Original file line numberDiff line numberDiff line change
@@ -1,137 +1,63 @@
1-
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2-
3-
/ {
4-
nss_dummy_reg: nss-regulator {
5-
compatible = "regulator-fixed";
6-
regulator-name = "nss-reg";
7-
regulator-min-microvolt = <848000>;
8-
regulator-max-microvolt = <848000>;
9-
regulator-always-on;
10-
regulator-boot-on;
11-
};
12-
};
1+
// SPDX-License-Identifier: GPL-2.0-only
132

143
&soc {
15-
nss-common {
16-
compatible = "qcom,nss-common";
17-
reg = <0x01868010 0x1000>;
18-
reg-names = "nss-misc-reset";
19-
memory-region = <&nss_region>;
20-
};
21-
22-
nss0: nss@40000000 {
23-
compatible = "qcom,nss";
24-
interrupts = <GIC_SPI 402 IRQ_TYPE_EDGE_RISING>,
25-
<GIC_SPI 401 IRQ_TYPE_EDGE_RISING>,
26-
<GIC_SPI 400 IRQ_TYPE_EDGE_RISING>,
27-
<GIC_SPI 399 IRQ_TYPE_EDGE_RISING>,
28-
<GIC_SPI 398 IRQ_TYPE_EDGE_RISING>,
29-
<GIC_SPI 397 IRQ_TYPE_EDGE_RISING>,
30-
<GIC_SPI 396 IRQ_TYPE_EDGE_RISING>,
31-
<GIC_SPI 395 IRQ_TYPE_EDGE_RISING>;
32-
reg = <0x07a00000 0x100>, <0x0b111000 0x1000>;
33-
reg-names = "nphys", "qgic-phys";
34-
clocks = <&gcc GCC_UBI0_CFG_CLK>,
35-
<&gcc GCC_UBI0_DBG_CLK>,
36-
<&gcc GCC_UBI0_CORE_CLK>,
37-
<&gcc GCC_UBI0_UTCM_CLK>,
38-
<&gcc GCC_UBI0_AXI_CLK>,
39-
<&gcc GCC_SNOC_UBI0_AXI_CLK>,
40-
<&gcc GCC_UBI0_NC_AXI_CLK>;
41-
clock-names = "nss-cfg-clk",
42-
"nss-dbg-clk",
43-
"nss-core-clk",
44-
"nss-utcm-clk",
45-
"nss-axi-clk",
46-
"nss-snoc-axi-clk",
47-
"nss-nc-axi-clk";
48-
qcom,id = <0>;
49-
qcom,num-queue = <4>;
50-
qcom,num-irq = <8>;
51-
qcom,num-pri = <4>;
52-
qcom,load-addr = <0x40000000>;
53-
qcom,low-frequency = <850000000>;
54-
qcom,mid-frequency = <850000000>;
55-
qcom,max-frequency = <1000000000>;
56-
qcom,ipv4-enabled;
57-
qcom,ipv4-reasm-enabled;
58-
qcom,ipv6-enabled;
59-
qcom,ipv6-reasm-enabled;
60-
qcom,tun6rd-enabled;
61-
qcom,l2tpv2-enabled;
62-
qcom,gre-enabled;
63-
qcom,map-t-enabled;
64-
qcom,pppoe-enabled;
65-
qcom,pptp-enabled;
66-
qcom,tunipip6-enabled;
67-
qcom,shaping-enabled;
68-
qcom,clmap-enabled;
69-
qcom,vxlan-enabled;
70-
qcom,match-enabled;
71-
qcom,mirror-enabled;
72-
qcom,crypto-enabled;
73-
qcom,ipsec-enabled;
74-
qcom,wlanredirect-enabled;
75-
qcom,gre-redir-enabled;
76-
qcom,gre-redir-mark-enabled;
77-
qcom,portid-enabled;
78-
qcom,wlan-dataplane-offload-enabled;
79-
qcom,pvxlan-enabled;
80-
qcom,udp-st-enabled;
81-
};
82-
83-
nss_crypto: qcom,nss_crypto {
84-
compatible = "qcom,nss-crypto";
85-
#address-cells = <1>;
86-
#size-cells = <1>;
87-
qcom,max-contexts = <64>;
88-
qcom,max-context-size = <144>;
89-
ranges;
90-
ce5_node {
91-
compatible = "qcom,ce5";
92-
reg-names = "crypto_pbase", "bam_base";
93-
reg = <0x0073a000 0x6000>, <0x00704000 0x20000>;
94-
qcom,dma-mask = <0x0c>;
95-
qcom,transform-enabled;
96-
qcom,aes128-cbc;
97-
qcom,aes256-cbc;
98-
qcom,aes128-ctr;
99-
qcom,aes256-ctr;
100-
qcom,aes128-ecb;
101-
qcom,aes256-ecb;
102-
qcom,3des-cbc;
103-
qcom,sha160-hash;
104-
qcom,sha256-hash;
105-
qcom,sha160-hmac;
106-
qcom,sha256-hmac;
107-
qcom,aes128-cbc-sha160-hmac;
108-
qcom,aes256-cbc-sha160-hmac;
109-
qcom,aes128-ctr-sha160-hmac;
110-
qcom,aes256-ctr-sha160-hmac;
111-
qcom,3des-cbc-sha160-hmac;
112-
qcom,3des-cbc-sha256-hmac;
113-
qcom,aes128-cbc-sha256-hmac;
114-
qcom,aes256-cbc-sha256-hmac;
115-
qcom,aes128-ctr-sha256-hmac;
116-
qcom,aes256-ctr-sha256-hmac;
117-
engine0 {
118-
qcom,ee = <2 3>;
119-
};
4+
nss-common {
5+
compatible = "qcom,nss-common";
6+
reg = <0x01868010 0x01>;
7+
reg-names = "nss-misc-reset";
1208
};
121-
};
1229

123-
nss-macsec0 {
124-
compatible = "qcom,nss-macsec";
125-
mdiobus = <&mdio>;
126-
phy_addr = <0x18>;
127-
phy_access_mode = <0x00>;
128-
};
129-
130-
nss-macsec1 {
131-
compatible = "qcom,nss-macsec";
132-
mdiobus = <&mdio>;
133-
phy_addr = <0x1c>;
134-
phy_access_mode = <0x00>;
135-
};
136-
137-
};
10+
nss0: nss@40000000 {
11+
compatible = "qcom,nss";
12+
interrupts = <0 402 0x1>, <0 401 0x1>, <0 400 0x1>,
13+
<0 399 0x1>, <0 398 0x1>, <0 397 0x1>,
14+
<0 396 0x1>, <0 395 0x1>;
15+
reg = <0x07a00000 0x100>, <0x0b111000 0x1000>;
16+
reg-names = "nphys", "qgic-phys";
17+
clocks = <&gcc GCC_UBI0_CFG_CLK>,
18+
<&gcc GCC_UBI0_DBG_CLK>,
19+
<&gcc GCC_UBI0_CORE_CLK>,
20+
<&gcc GCC_UBI0_UTCM_CLK>,
21+
<&gcc GCC_UBI0_AXI_CLK>,
22+
<&gcc GCC_SNOC_UBI0_AXI_CLK>,
23+
<&gcc GCC_UBI0_NC_AXI_CLK>;
24+
clock-names = "nss-cfg-clk", "nss-dbg-clk",
25+
"nss-core-clk", "nss-utcm-clk",
26+
"nss-axi-clk",
27+
"nss-snoc-axi-clk",
28+
"nss-nc-axi-clk";
29+
qcom,id = <0>;
30+
qcom,num-queue = <4>;
31+
qcom,num-irq = <8>;
32+
qcom,num-pri = <4>;
33+
qcom,load-addr = <0x40000000>;
34+
qcom,low-frequency = <850000000>;
35+
qcom,mid-frequency = <850000000>;
36+
qcom,max-frequency = <1000000000>;
37+
qcom,ipv4-enabled;
38+
qcom,ipv4-reasm-enabled;
39+
qcom,ipv6-enabled;
40+
qcom,ipv6-reasm-enabled;
41+
qcom,tun6rd-enabled;
42+
qcom,l2tpv2-enabled;
43+
qcom,gre-enabled;
44+
qcom,map-t-enabled;
45+
qcom,pppoe-enabled;
46+
qcom,pptp-enabled;
47+
qcom,tunipip6-enabled;
48+
qcom,shaping-enabled;
49+
qcom,clmap-enabled;
50+
qcom,vxlan-enabled;
51+
qcom,match-enabled;
52+
qcom,mirror-enabled;
53+
qcom,crypto-enabled;
54+
qcom,ipsec-enabled;
55+
qcom,wlanredirect-enabled;
56+
qcom,gre-redir-enabled;
57+
qcom,gre-redir-mark-enabled;
58+
qcom,portid-enabled;
59+
qcom,wlan-dataplane-offload-enabled;
60+
qcom,pvxlan-enabled;
61+
qcom,udp-st-enabled;
62+
};
63+
};

0 commit comments

Comments
 (0)