@@ -232,7 +232,7 @@ def make_ttgir(mod, metadata, opt, capability):
232232 # Set up Diagnostic
233233 if os .environ .get ("MLIR_ENABLE_REMARK" , "0" ) == "1" :
234234 srcMgr = llvm .source_mgr ()
235- diag = ir .source_mgr_diag (srcMgr , mod .context )
235+ _ = ir .source_mgr_diag (srcMgr , mod .context )
236236 mod .context .printOpOnDiagnostic (True )
237237 # TTIR -> TTGIR
238238 pm = ir .pass_manager (mod .context )
@@ -286,7 +286,7 @@ def make_llir(src, metadata, options, capability):
286286 # Set up Diagnostic
287287 if os .environ .get ("MLIR_ENABLE_REMARK" , "0" ) == "1" :
288288 srcMgr = llvm .source_mgr ()
289- diag = ir .source_mgr_diag (srcMgr , mod .context )
289+ _ = ir .source_mgr_diag (srcMgr , mod .context )
290290 mod .context .printOpOnDiagnostic (True )
291291 passes .ttgpuir .add_combine_tensor_select_and_if (pm )
292292 passes .convert .add_scf_to_cf (pm )
@@ -306,7 +306,7 @@ def make_llir(src, metadata, options, capability):
306306 llvm .init_targets ()
307307 context = llvm .context ()
308308 if os .environ .get ("TRITON_ENABLE_ASAN" , "0" ) == "1" :
309- raise ASANError (
309+ raise RuntimeError (
310310 "Address Sanitizer Error: Address sanitizer is currently only supporteedd on the AMD backend" )
311311 llvm_mod = llvm .to_module (mod , context )
312312 proc = 'sm_90a' if capability == 90 else f'sm_{ capability } '
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