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peter-hoferpeter-hofer
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Query reserved registers via LIRGeneratorTool in AMD64 BigInteger intrinsics.
1 parent 37a50e5 commit 39151dc

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7 files changed

+32
-30
lines changed

7 files changed

+32
-30
lines changed

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/core/amd64/AMD64LIRGenerator.java‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -978,7 +978,7 @@ public void emitBigIntegerMultiplyToLen(Value x, Value xlen, Value y, Value ylen
978978
emitMove(rZ, z);
979979
emitMove(rZlen, zlen);
980980

981-
append(new AMD64BigIntegerMultiplyToLenOp(rX, rXlen, rY, rYlen, rZ, rZlen, this::isReservedRegister));
981+
append(new AMD64BigIntegerMultiplyToLenOp(this, rX, rXlen, rY, rYlen, rZ, rZlen));
982982
}
983983

984984
@Override
@@ -995,7 +995,7 @@ public Variable emitBigIntegerMulAdd(Value out, Value in, Value offset, Value le
995995
emitMove(rLen, len);
996996
emitMove(rK, k);
997997

998-
append(new AMD64BigIntegerMulAddOp(rOut, rIn, rOffset, rLen, rK, this::isReservedRegister));
998+
append(new AMD64BigIntegerMulAddOp(this, rOut, rIn, rOffset, rLen, rK));
999999
// result of AMD64BigIntegerMulAddOp is stored at rax
10001000
Variable result = newVariable(len.getValueKind());
10011001
emitMove(result, AMD64.rax.asValue(len.getValueKind()));
@@ -1014,7 +1014,7 @@ public void emitBigIntegerSquareToLen(Value x, Value len, Value z, Value zlen) {
10141014
emitMove(rZ, z);
10151015
emitMove(rZlen, zlen);
10161016

1017-
append(new AMD64BigIntegerSquareToLenOp(rX, rLen, rZ, rZlen, this::isReservedRegister));
1017+
append(new AMD64BigIntegerSquareToLenOp(this, rX, rLen, rZ, rZlen));
10181018
}
10191019

10201020
@Override

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMulAddOp.java‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,6 @@
4141
import static jdk.vm.ci.amd64.AMD64.CPUFeature.BMI2;
4242
import static jdk.vm.ci.code.ValueUtil.asRegister;
4343

44-
import java.util.function.Predicate;
45-
4644
import jdk.graal.compiler.asm.Label;
4745
import jdk.graal.compiler.asm.amd64.AMD64Address;
4846
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -52,6 +50,7 @@
5250
import jdk.graal.compiler.lir.LIRInstructionClass;
5351
import jdk.graal.compiler.lir.SyncPort;
5452
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
53+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5554
import jdk.vm.ci.amd64.AMD64;
5655
import jdk.vm.ci.amd64.AMD64Kind;
5756
import jdk.vm.ci.code.Register;
@@ -83,12 +82,12 @@ public final class AMD64BigIntegerMulAddOp extends AMD64LIRInstruction {
8382
private final boolean spillR13;
8483

8584
public AMD64BigIntegerMulAddOp(
85+
LIRGeneratorTool tool,
8686
Value outValue,
8787
Value inValue,
8888
Value offsetValue,
8989
Value lenValue,
90-
Value kValue,
91-
Predicate<Register> isReservedRegister) {
90+
Value kValue) {
9291
super(TYPE);
9392

9493
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -106,13 +105,13 @@ public AMD64BigIntegerMulAddOp(
106105
this.kValue = kValue;
107106
this.result = AMD64.rax.asValue(lenValue.getValueKind());
108107

109-
if (isReservedRegister.test(r12)) {
110-
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
108+
if (tool.isReservedRegister(r12)) {
109+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
111110
this.tmp1Value = r14.asValue();
112111
} else {
113112
this.tmp1Value = r12.asValue();
114113
}
115-
this.spillR13 = isReservedRegister.test(r13);
114+
this.spillR13 = tool.isReservedRegister(r13);
116115

117116
this.tmpValues = new Value[]{
118117
rax.asValue(),

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMultiplyToLenOp.java‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,6 @@
4242
import static jdk.vm.ci.amd64.AMD64.CPUFeature.BMI2;
4343
import static jdk.vm.ci.code.ValueUtil.asRegister;
4444

45-
import java.util.function.Predicate;
46-
4745
import jdk.graal.compiler.asm.Label;
4846
import jdk.graal.compiler.asm.amd64.AMD64Address;
4947
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -53,6 +51,7 @@
5351
import jdk.graal.compiler.lir.LIRInstructionClass;
5452
import jdk.graal.compiler.lir.SyncPort;
5553
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
54+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5655
import jdk.vm.ci.amd64.AMD64Kind;
5756
import jdk.vm.ci.code.Register;
5857
import jdk.vm.ci.meta.Value;
@@ -80,13 +79,13 @@ public final class AMD64BigIntegerMultiplyToLenOp extends AMD64LIRInstruction {
8079
private final boolean spillR13;
8180

8281
public AMD64BigIntegerMultiplyToLenOp(
82+
LIRGeneratorTool tool,
8383
Value xValue,
8484
Value xlenValue,
8585
Value yValue,
8686
Value ylenValue,
8787
Value zValue,
88-
Value zlenValue,
89-
Predicate<Register> isReservedRegister) {
88+
Value zlenValue) {
9089
super(TYPE);
9190

9291
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -105,13 +104,13 @@ public AMD64BigIntegerMultiplyToLenOp(
105104
this.zValue = zValue;
106105
this.zlenValue = zlenValue;
107106

108-
if (isReservedRegister.test(r12)) {
109-
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
107+
if (tool.isReservedRegister(r12)) {
108+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
110109
this.tmp1Value = r14.asValue();
111110
} else {
112111
this.tmp1Value = r12.asValue();
113112
}
114-
this.spillR13 = isReservedRegister.test(r13);
113+
this.spillR13 = tool.isReservedRegister(r13);
115114

116115
this.tmpValues = new Value[]{
117116
rax.asValue(),

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerSquareToLenOp.java‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,6 @@
4141
import static jdk.vm.ci.amd64.AMD64.rsi;
4242
import static jdk.vm.ci.code.ValueUtil.asRegister;
4343

44-
import java.util.function.Predicate;
45-
4644
import jdk.graal.compiler.asm.Label;
4745
import jdk.graal.compiler.asm.amd64.AMD64Address;
4846
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -52,6 +50,7 @@
5250
import jdk.graal.compiler.lir.LIRInstructionClass;
5351
import jdk.graal.compiler.lir.SyncPort;
5452
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
53+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5554
import jdk.vm.ci.amd64.AMD64Kind;
5655
import jdk.vm.ci.code.Register;
5756
import jdk.vm.ci.meta.Value;
@@ -77,11 +76,11 @@ public final class AMD64BigIntegerSquareToLenOp extends AMD64LIRInstruction {
7776
private final boolean spillR13;
7877

7978
public AMD64BigIntegerSquareToLenOp(
79+
LIRGeneratorTool tool,
8080
Value xValue,
8181
Value lenValue,
8282
Value zValue,
83-
Value zlenValue,
84-
Predicate<Register> isReservedRegister) {
83+
Value zlenValue) {
8584
super(TYPE);
8685

8786
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -96,13 +95,13 @@ public AMD64BigIntegerSquareToLenOp(
9695
this.zValue = zValue;
9796
this.zlenValue = zlenValue;
9897

99-
if (isReservedRegister.test(r12)) {
100-
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
98+
if (tool.isReservedRegister(r12)) {
99+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
101100
this.tmp1Value = r14.asValue();
102101
} else {
103102
this.tmp1Value = r12.asValue();
104103
}
105-
this.spillR13 = isReservedRegister.test(r13);
104+
this.spillR13 = tool.isReservedRegister(r13);
106105

107106
this.tmpValues = new Value[]{
108107
rax.asValue(),

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/gen/LIRGenerator.java‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -855,10 +855,4 @@ public LIRInstruction zapArgumentSpace() {
855855
public int getArrayBaseOffset(JavaKind elementKind) {
856856
return getMetaAccess().getArrayBaseOffset(elementKind);
857857
}
858-
859-
/**
860-
* Determines whether the given register is a reserved register, such as the register holding
861-
* the heap base address for compressed pointers.
862-
*/
863-
public abstract boolean isReservedRegister(Register r);
864858
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/gen/LIRGeneratorTool.java‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -717,4 +717,10 @@ default void emitZeroMemory(Value address, Value length, boolean isAligned) {
717717
default VectorSize getMaxVectorSize(EnumSet<?> runtimeCheckedCPUFeatures) {
718718
throw GraalError.unimplemented("Max vector size is not specified on this architecture"); // ExcludeFromJacocoGeneratedReport
719719
}
720+
721+
/**
722+
* Determines whether the given register is a reserved register, such as the register holding
723+
* the heap base address for compressed pointers.
724+
*/
725+
boolean isReservedRegister(Register r);
720726
}

‎substratevm/src/com.oracle.svm.core.graal.llvm/src/com/oracle/svm/core/graal/llvm/LLVMGenerator.java‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1850,4 +1850,9 @@ public void emitCacheWriteback(Value address) {
18501850
public void emitCacheWritebackSync(boolean isPreSync) {
18511851
builder.buildFence();
18521852
}
1853+
1854+
@Override
1855+
public boolean isReservedRegister(Register r) {
1856+
return ReservedRegisters.singleton().isReservedRegister(r);
1857+
}
18531858
}

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