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peter-hoferpeter-hofer
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Introduce a code base register.
1 parent 94cf473 commit 4ec7008

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36 files changed

+347
-91
lines changed

36 files changed

+347
-91
lines changed

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/core/amd64/AMD64LIRGenerator.java‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -978,7 +978,7 @@ public void emitBigIntegerMultiplyToLen(Value x, Value xlen, Value y, Value ylen
978978
emitMove(rZ, z);
979979
emitMove(rZlen, zlen);
980980

981-
append(new AMD64BigIntegerMultiplyToLenOp(rX, rXlen, rY, rYlen, rZ, rZlen, getHeapBaseRegister()));
981+
append(new AMD64BigIntegerMultiplyToLenOp(rX, rXlen, rY, rYlen, rZ, rZlen, this::isReservedRegister));
982982
}
983983

984984
@Override
@@ -995,7 +995,7 @@ public Variable emitBigIntegerMulAdd(Value out, Value in, Value offset, Value le
995995
emitMove(rLen, len);
996996
emitMove(rK, k);
997997

998-
append(new AMD64BigIntegerMulAddOp(rOut, rIn, rOffset, rLen, rK, getHeapBaseRegister()));
998+
append(new AMD64BigIntegerMulAddOp(rOut, rIn, rOffset, rLen, rK, this::isReservedRegister));
999999
// result of AMD64BigIntegerMulAddOp is stored at rax
10001000
Variable result = newVariable(len.getValueKind());
10011001
emitMove(result, AMD64.rax.asValue(len.getValueKind()));
@@ -1014,7 +1014,7 @@ public void emitBigIntegerSquareToLen(Value x, Value len, Value z, Value zlen) {
10141014
emitMove(rZ, z);
10151015
emitMove(rZlen, zlen);
10161016

1017-
append(new AMD64BigIntegerSquareToLenOp(rX, rLen, rZ, rZlen, getHeapBaseRegister()));
1017+
append(new AMD64BigIntegerSquareToLenOp(rX, rLen, rZ, rZlen, this::isReservedRegister));
10181018
}
10191019

10201020
@Override

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/aarch64/AArch64HotSpotLIRGenerator.java‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -501,8 +501,8 @@ public int getArrayLengthOffset() {
501501
}
502502

503503
@Override
504-
public Register getHeapBaseRegister() {
505-
return getProviders().getRegisters().getHeapBaseRegister();
504+
public boolean isReservedRegister(Register r) {
505+
return getProviders().getRegisters().isReservedRegister(r);
506506
}
507507

508508
@Override

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/amd64/AMD64HotSpotLIRGenerator.java‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -629,8 +629,8 @@ public int getArrayLengthOffset() {
629629
}
630630

631631
@Override
632-
public Register getHeapBaseRegister() {
633-
return getProviders().getRegisters().getHeapBaseRegister();
632+
public boolean isReservedRegister(Register r) {
633+
return getProviders().getRegisters().isReservedRegister(r);
634634
}
635635

636636
// no need to call super because HotSpot already overrides the value according to the CPU

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/meta/HotSpotRegisters.java‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,4 +68,9 @@ public Register getZeroValueRegister(GraalHotSpotVMConfig config) {
6868
}
6969
return Register.None;
7070
}
71+
72+
@Override
73+
public boolean isReservedRegister(Register r) {
74+
return !r.equals(Register.None) && (r.equals(threadRegister) || r.equals(heapBaseRegister) || r.equals(stackPointerRegister));
75+
}
7176
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/meta/HotSpotRegistersProvider.java‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,4 +51,9 @@ public interface HotSpotRegistersProvider {
5151
* Gets the register whose value is always 0.
5252
*/
5353
Register getZeroValueRegister(GraalHotSpotVMConfig config);
54+
55+
/**
56+
* Determines whether the given register is one of the reserved special registers.
57+
*/
58+
boolean isReservedRegister(Register r);
5459
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMulAddOp.java‎

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@
4141
import static jdk.vm.ci.amd64.AMD64.CPUFeature.BMI2;
4242
import static jdk.vm.ci.code.ValueUtil.asRegister;
4343

44+
import java.util.function.Predicate;
45+
4446
import jdk.graal.compiler.asm.Label;
4547
import jdk.graal.compiler.asm.amd64.AMD64Address;
4648
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -50,7 +52,6 @@
5052
import jdk.graal.compiler.lir.LIRInstructionClass;
5153
import jdk.graal.compiler.lir.SyncPort;
5254
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
53-
5455
import jdk.vm.ci.amd64.AMD64;
5556
import jdk.vm.ci.amd64.AMD64Kind;
5657
import jdk.vm.ci.code.Register;
@@ -79,13 +80,15 @@ public final class AMD64BigIntegerMulAddOp extends AMD64LIRInstruction {
7980
@Temp({OperandFlag.REG}) private Value tmp1Value;
8081
@Temp({OperandFlag.REG}) private Value[] tmpValues;
8182

83+
private final boolean spillR13;
84+
8285
public AMD64BigIntegerMulAddOp(
8386
Value outValue,
8487
Value inValue,
8588
Value offsetValue,
8689
Value lenValue,
8790
Value kValue,
88-
Register heapBaseRegister) {
91+
Predicate<Register> isReservedRegister) {
8992
super(TYPE);
9093

9194
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -103,7 +106,13 @@ public AMD64BigIntegerMulAddOp(
103106
this.kValue = kValue;
104107
this.result = AMD64.rax.asValue(lenValue.getValueKind());
105108

106-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
109+
if (isReservedRegister.test(r12)) {
110+
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
111+
this.tmp1Value = r14.asValue();
112+
} else {
113+
this.tmp1Value = r12.asValue();
114+
}
115+
this.spillR13 = isReservedRegister.test(r13);
107116

108117
this.tmpValues = new Value[]{
109118
rax.asValue(),
@@ -140,7 +149,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
140149
Register tmp4 = r10;
141150
Register tmp5 = rbx;
142151

152+
if (spillR13) {
153+
masm.push(r13);
154+
}
143155
mulAdd(masm, out, in, offset, len, k, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
156+
if (spillR13) {
157+
masm.pop(r13);
158+
}
144159
}
145160

146161
static boolean useBMI2Instructions(AMD64MacroAssembler masm) {

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMultiplyToLenOp.java‎

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,8 @@
4242
import static jdk.vm.ci.amd64.AMD64.CPUFeature.BMI2;
4343
import static jdk.vm.ci.code.ValueUtil.asRegister;
4444

45+
import java.util.function.Predicate;
46+
4547
import jdk.graal.compiler.asm.Label;
4648
import jdk.graal.compiler.asm.amd64.AMD64Address;
4749
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -75,14 +77,16 @@ public final class AMD64BigIntegerMultiplyToLenOp extends AMD64LIRInstruction {
7577
@Temp({OperandFlag.REG}) private Value tmp1Value;
7678
@Temp({OperandFlag.REG}) private Value[] tmpValues;
7779

80+
private final boolean spillR13;
81+
7882
public AMD64BigIntegerMultiplyToLenOp(
7983
Value xValue,
8084
Value xlenValue,
8185
Value yValue,
8286
Value ylenValue,
8387
Value zValue,
8488
Value zlenValue,
85-
Register heapBaseRegister) {
89+
Predicate<Register> isReservedRegister) {
8690
super(TYPE);
8791

8892
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -101,7 +105,14 @@ public AMD64BigIntegerMultiplyToLenOp(
101105
this.zValue = zValue;
102106
this.zlenValue = zlenValue;
103107

104-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
108+
if (isReservedRegister.test(r12)) {
109+
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
110+
this.tmp1Value = r14.asValue();
111+
} else {
112+
this.tmp1Value = r12.asValue();
113+
}
114+
this.spillR13 = isReservedRegister.test(r13);
115+
105116
this.tmpValues = new Value[]{
106117
rax.asValue(),
107118
rcx.asValue(),
@@ -139,7 +150,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
139150
Register tmp4 = r10;
140151
Register tmp5 = rbx;
141152

153+
if (spillR13) {
154+
masm.push(r13);
155+
}
142156
multiplyToLen(masm, x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5);
157+
if (spillR13) {
158+
masm.pop(r13);
159+
}
143160
}
144161

145162
private static void add2WithCarry(AMD64MacroAssembler masm,

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerSquareToLenOp.java‎

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@
4141
import static jdk.vm.ci.amd64.AMD64.rsi;
4242
import static jdk.vm.ci.code.ValueUtil.asRegister;
4343

44+
import java.util.function.Predicate;
45+
4446
import jdk.graal.compiler.asm.Label;
4547
import jdk.graal.compiler.asm.amd64.AMD64Address;
4648
import jdk.graal.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
@@ -72,12 +74,14 @@ public final class AMD64BigIntegerSquareToLenOp extends AMD64LIRInstruction {
7274
@Temp({OperandFlag.REG}) private Value tmp1Value;
7375
@Temp({OperandFlag.REG}) private Value[] tmpValues;
7476

77+
private final boolean spillR13;
78+
7579
public AMD64BigIntegerSquareToLenOp(
7680
Value xValue,
7781
Value lenValue,
7882
Value zValue,
7983
Value zlenValue,
80-
Register heapBaseRegister) {
84+
Predicate<Register> isReservedRegister) {
8185
super(TYPE);
8286

8387
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -92,7 +96,14 @@ public AMD64BigIntegerSquareToLenOp(
9296
this.zValue = zValue;
9397
this.zlenValue = zlenValue;
9498

95-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
99+
if (isReservedRegister.test(r12)) {
100+
GraalError.guarantee(!isReservedRegister.test(r14), "One of r12 or r14 must be available");
101+
this.tmp1Value = r14.asValue();
102+
} else {
103+
this.tmp1Value = r12.asValue();
104+
}
105+
this.spillR13 = isReservedRegister.test(r13);
106+
96107
this.tmpValues = new Value[]{
97108
rax.asValue(),
98109
rcx.asValue(),
@@ -125,7 +136,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
125136
Register tmp4 = r10;
126137
Register tmp5 = rbx;
127138

139+
if (spillR13) {
140+
masm.push(r13);
141+
}
128142
squareToLen(masm, x, len, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
143+
if (spillR13) {
144+
masm.pop(r13);
145+
}
129146
}
130147

131148
static void squareRshift(AMD64MacroAssembler masm, Register x, Register xlen, Register z,

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/gen/LIRGenerator.java‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -857,7 +857,8 @@ public int getArrayBaseOffset(JavaKind elementKind) {
857857
}
858858

859859
/**
860-
* Returns the register holding the heap base address for compressed pointer.
860+
* Determines whether the given register is a reserved register, such as the register holding
861+
* the heap base address for compressed pointers.
861862
*/
862-
public abstract Register getHeapBaseRegister();
863+
public abstract boolean isReservedRegister(Register r);
863864
}

‎substratevm/src/com.oracle.svm.core.genscavenge/src/com/oracle/svm/core/genscavenge/AddressRangeCommittedMemoryProvider.java‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ public int initialize(WordPointer heapBasePointer, IsolateArguments arguments) {
167167
return errorCode;
168168
}
169169

170-
CEntryPointSnippets.setHeapBase(heapBasePointer.read());
170+
CEntryPointSnippets.initBaseRegisters(heapBasePointer.read());
171171
WordPointer runtimeHeapBeginOut = StackValue.get(WordPointer.class);
172172
errorCode = getCollectedHeapBegin(arguments, begin, reserved, imageHeapEndOut.read(), runtimeHeapBeginOut);
173173
if (errorCode != CEntryPointErrors.NO_ERROR) {

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