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peter-hoferpeter-hofer
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[GR-64584] Base-relative code pointers in vtables for non-layered images.
PullRequest: graal/20671
2 parents d801912 + 5322cc4 commit fb645b6

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88 files changed

+1110
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‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/core/amd64/AMD64LIRGenerator.java‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -978,7 +978,7 @@ public void emitBigIntegerMultiplyToLen(Value x, Value xlen, Value y, Value ylen
978978
emitMove(rZ, z);
979979
emitMove(rZlen, zlen);
980980

981-
append(new AMD64BigIntegerMultiplyToLenOp(rX, rXlen, rY, rYlen, rZ, rZlen, getHeapBaseRegister()));
981+
append(new AMD64BigIntegerMultiplyToLenOp(this, rX, rXlen, rY, rYlen, rZ, rZlen));
982982
}
983983

984984
@Override
@@ -995,7 +995,7 @@ public Variable emitBigIntegerMulAdd(Value out, Value in, Value offset, Value le
995995
emitMove(rLen, len);
996996
emitMove(rK, k);
997997

998-
append(new AMD64BigIntegerMulAddOp(rOut, rIn, rOffset, rLen, rK, getHeapBaseRegister()));
998+
append(new AMD64BigIntegerMulAddOp(this, rOut, rIn, rOffset, rLen, rK));
999999
// result of AMD64BigIntegerMulAddOp is stored at rax
10001000
Variable result = newVariable(len.getValueKind());
10011001
emitMove(result, AMD64.rax.asValue(len.getValueKind()));
@@ -1014,7 +1014,7 @@ public void emitBigIntegerSquareToLen(Value x, Value len, Value z, Value zlen) {
10141014
emitMove(rZ, z);
10151015
emitMove(rZlen, zlen);
10161016

1017-
append(new AMD64BigIntegerSquareToLenOp(rX, rLen, rZ, rZlen, getHeapBaseRegister()));
1017+
append(new AMD64BigIntegerSquareToLenOp(this, rX, rLen, rZ, rZlen));
10181018
}
10191019

10201020
@Override

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/aarch64/AArch64HotSpotLIRGenerator.java‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -501,8 +501,8 @@ public int getArrayLengthOffset() {
501501
}
502502

503503
@Override
504-
public Register getHeapBaseRegister() {
505-
return getProviders().getRegisters().getHeapBaseRegister();
504+
public boolean isReservedRegister(Register r) {
505+
return getProviders().getRegisters().isReservedRegister(r);
506506
}
507507

508508
@Override

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/amd64/AMD64HotSpotLIRGenerator.java‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -629,8 +629,8 @@ public int getArrayLengthOffset() {
629629
}
630630

631631
@Override
632-
public Register getHeapBaseRegister() {
633-
return getProviders().getRegisters().getHeapBaseRegister();
632+
public boolean isReservedRegister(Register r) {
633+
return getProviders().getRegisters().isReservedRegister(r);
634634
}
635635

636636
// no need to call super because HotSpot already overrides the value according to the CPU

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/meta/HotSpotRegisters.java‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,4 +68,9 @@ public Register getZeroValueRegister(GraalHotSpotVMConfig config) {
6868
}
6969
return Register.None;
7070
}
71+
72+
@Override
73+
public boolean isReservedRegister(Register r) {
74+
return !r.equals(Register.None) && (r.equals(threadRegister) || r.equals(heapBaseRegister) || r.equals(stackPointerRegister));
75+
}
7176
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/hotspot/meta/HotSpotRegistersProvider.java‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,4 +51,9 @@ public interface HotSpotRegistersProvider {
5151
* Gets the register whose value is always 0.
5252
*/
5353
Register getZeroValueRegister(GraalHotSpotVMConfig config);
54+
55+
/**
56+
* Determines whether the given register is one of the reserved special registers.
57+
*/
58+
boolean isReservedRegister(Register r);
5459
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMulAddOp.java‎

Lines changed: 23 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@
5050
import jdk.graal.compiler.lir.LIRInstructionClass;
5151
import jdk.graal.compiler.lir.SyncPort;
5252
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
53-
53+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5454
import jdk.vm.ci.amd64.AMD64;
5555
import jdk.vm.ci.amd64.AMD64Kind;
5656
import jdk.vm.ci.code.Register;
@@ -79,13 +79,15 @@ public final class AMD64BigIntegerMulAddOp extends AMD64LIRInstruction {
7979
@Temp({OperandFlag.REG}) private Value tmp1Value;
8080
@Temp({OperandFlag.REG}) private Value[] tmpValues;
8181

82+
private final boolean spillR13;
83+
8284
public AMD64BigIntegerMulAddOp(
85+
LIRGeneratorTool tool,
8386
Value outValue,
8487
Value inValue,
8588
Value offsetValue,
8689
Value lenValue,
87-
Value kValue,
88-
Register heapBaseRegister) {
90+
Value kValue) {
8991
super(TYPE);
9092

9193
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -103,7 +105,13 @@ public AMD64BigIntegerMulAddOp(
103105
this.kValue = kValue;
104106
this.result = AMD64.rax.asValue(lenValue.getValueKind());
105107

106-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
108+
if (tool.isReservedRegister(r12)) {
109+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
110+
this.tmp1Value = r14.asValue();
111+
} else {
112+
this.tmp1Value = r12.asValue();
113+
}
114+
this.spillR13 = tool.isReservedRegister(r13);
107115

108116
this.tmpValues = new Value[]{
109117
rax.asValue(),
@@ -120,6 +128,11 @@ public AMD64BigIntegerMulAddOp(
120128
};
121129
}
122130

131+
@Override
132+
public boolean modifiesStackPointer() {
133+
return spillR13;
134+
}
135+
123136
@Override
124137
public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
125138
GraalError.guarantee(outValue.getPlatformKind().equals(AMD64Kind.QWORD), "Invalid outValue kind: %s", outValue);
@@ -140,7 +153,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
140153
Register tmp4 = r10;
141154
Register tmp5 = rbx;
142155

156+
if (spillR13) {
157+
masm.push(r13);
158+
}
143159
mulAdd(masm, out, in, offset, len, k, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
160+
if (spillR13) {
161+
masm.pop(r13);
162+
}
144163
}
145164

146165
static boolean useBMI2Instructions(AMD64MacroAssembler masm) {

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerMultiplyToLenOp.java‎

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@
5151
import jdk.graal.compiler.lir.LIRInstructionClass;
5252
import jdk.graal.compiler.lir.SyncPort;
5353
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
54+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5455
import jdk.vm.ci.amd64.AMD64Kind;
5556
import jdk.vm.ci.code.Register;
5657
import jdk.vm.ci.meta.Value;
@@ -75,14 +76,16 @@ public final class AMD64BigIntegerMultiplyToLenOp extends AMD64LIRInstruction {
7576
@Temp({OperandFlag.REG}) private Value tmp1Value;
7677
@Temp({OperandFlag.REG}) private Value[] tmpValues;
7778

79+
private final boolean spillR13;
80+
7881
public AMD64BigIntegerMultiplyToLenOp(
82+
LIRGeneratorTool tool,
7983
Value xValue,
8084
Value xlenValue,
8185
Value yValue,
8286
Value ylenValue,
8387
Value zValue,
84-
Value zlenValue,
85-
Register heapBaseRegister) {
88+
Value zlenValue) {
8689
super(TYPE);
8790

8891
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -101,7 +104,14 @@ public AMD64BigIntegerMultiplyToLenOp(
101104
this.zValue = zValue;
102105
this.zlenValue = zlenValue;
103106

104-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
107+
if (tool.isReservedRegister(r12)) {
108+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
109+
this.tmp1Value = r14.asValue();
110+
} else {
111+
this.tmp1Value = r12.asValue();
112+
}
113+
this.spillR13 = tool.isReservedRegister(r13);
114+
105115
this.tmpValues = new Value[]{
106116
rax.asValue(),
107117
rcx.asValue(),
@@ -139,7 +149,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
139149
Register tmp4 = r10;
140150
Register tmp5 = rbx;
141151

152+
if (spillR13) {
153+
masm.push(r13);
154+
}
142155
multiplyToLen(masm, x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5);
156+
if (spillR13) {
157+
masm.pop(r13);
158+
}
143159
}
144160

145161
private static void add2WithCarry(AMD64MacroAssembler masm,

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/amd64/AMD64BigIntegerSquareToLenOp.java‎

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@
5050
import jdk.graal.compiler.lir.LIRInstructionClass;
5151
import jdk.graal.compiler.lir.SyncPort;
5252
import jdk.graal.compiler.lir.asm.CompilationResultBuilder;
53+
import jdk.graal.compiler.lir.gen.LIRGeneratorTool;
5354
import jdk.vm.ci.amd64.AMD64Kind;
5455
import jdk.vm.ci.code.Register;
5556
import jdk.vm.ci.meta.Value;
@@ -72,12 +73,14 @@ public final class AMD64BigIntegerSquareToLenOp extends AMD64LIRInstruction {
7273
@Temp({OperandFlag.REG}) private Value tmp1Value;
7374
@Temp({OperandFlag.REG}) private Value[] tmpValues;
7475

76+
private final boolean spillR13;
77+
7578
public AMD64BigIntegerSquareToLenOp(
79+
LIRGeneratorTool tool,
7680
Value xValue,
7781
Value lenValue,
7882
Value zValue,
79-
Value zlenValue,
80-
Register heapBaseRegister) {
83+
Value zlenValue) {
8184
super(TYPE);
8285

8386
// Due to lack of allocatable registers, we use fixed registers and mark them as @Use+@Temp.
@@ -92,7 +95,14 @@ public AMD64BigIntegerSquareToLenOp(
9295
this.zValue = zValue;
9396
this.zlenValue = zlenValue;
9497

95-
this.tmp1Value = r12.equals(heapBaseRegister) ? r14.asValue() : r12.asValue();
98+
if (tool.isReservedRegister(r12)) {
99+
GraalError.guarantee(!tool.isReservedRegister(r14), "One of r12 or r14 must be available");
100+
this.tmp1Value = r14.asValue();
101+
} else {
102+
this.tmp1Value = r12.asValue();
103+
}
104+
this.spillR13 = tool.isReservedRegister(r13);
105+
96106
this.tmpValues = new Value[]{
97107
rax.asValue(),
98108
rcx.asValue(),
@@ -125,7 +135,13 @@ public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
125135
Register tmp4 = r10;
126136
Register tmp5 = rbx;
127137

138+
if (spillR13) {
139+
masm.push(r13);
140+
}
128141
squareToLen(masm, x, len, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
142+
if (spillR13) {
143+
masm.pop(r13);
144+
}
129145
}
130146

131147
static void squareRshift(AMD64MacroAssembler masm, Register x, Register xlen, Register z,

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/gen/LIRGenerator.java‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -855,9 +855,4 @@ public LIRInstruction zapArgumentSpace() {
855855
public int getArrayBaseOffset(JavaKind elementKind) {
856856
return getMetaAccess().getArrayBaseOffset(elementKind);
857857
}
858-
859-
/**
860-
* Returns the register holding the heap base address for compressed pointer.
861-
*/
862-
public abstract Register getHeapBaseRegister();
863858
}

‎compiler/src/jdk.graal.compiler/src/jdk/graal/compiler/lir/gen/LIRGeneratorTool.java‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -717,4 +717,10 @@ default void emitZeroMemory(Value address, Value length, boolean isAligned) {
717717
default VectorSize getMaxVectorSize(EnumSet<?> runtimeCheckedCPUFeatures) {
718718
throw GraalError.unimplemented("Max vector size is not specified on this architecture"); // ExcludeFromJacocoGeneratedReport
719719
}
720+
721+
/**
722+
* Determines whether the given register is a reserved register, such as the register holding
723+
* the heap base address for compressed pointers.
724+
*/
725+
boolean isReservedRegister(Register r);
720726
}

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