Is I2S PLL clock configuration missing?

[jgpeiro]

I had some issues with I2S data reception cause the clock wasnt perfect (47.8KHz instead of 48KHz). Checking the machine_i2s.c I saw that there is no configuration of the PLLI2S, so I simply added my custom HAL_I2S_Msp function to configure it and now it works perfectly. (This function is called internally from the ST HAL. If not defined, a "weak" version is provided by ST)

Im wondering if someone knows how machine_i2s.c performs the clock configurationn and if this funcion that I added is really needed.
Im not sure this module was made by @miketeachman

Note: Im using a Blackpill board, based on STM32F411 that uses a 25MHz crystal.

void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s)
{
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
    PeriphClkInitStruct.PLLI2S.PLLI2SN = 384;
    PeriphClkInitStruct.PLLI2S.PLLI2SM = 25;
    PeriphClkInitStruct.PLLI2S.PLLI2SR = 5;
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
    {
        printf( "HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK\n" );
    }
    else
    {
        printf( "HAL_RCCEx_PeriphCLKConfig HAL_OK\n" );
    }
}```

[miketeachman]

Thank you for identifying the issue with I2S SCK frequency. The present MicroPython I2S implementation uses the default I2S PLL configuration and relies on the I2S HAL implementation to set the I2S SCK frequency (by calculating I2SDIV and I2SODD in the function HAL_I2S_Init() ) . I assumed this implementation would provide a close enough frequency for I2S applications. As you've shown, this assumption is wrong for some applications.

Can I ask you to submit a Github Issue? I'll make a PR to fix the frequency problem.

Again, thanks for taking the time to report this.

[jgpeiro]

I submit a feature request here:

#10280 (comment)

hope I did well