DMA doesn't work correctly with specified ring size

[HarleyYan]

Hello!

I want to use DMA to transfer same data repeatedly, and I found ring size can achieve this.

so, I test it with following steps:

1. create a source array and fill it with random numbers
2. create a destination array with double size, fill it with zero
3. set source array to read address of DMA channel 0, and set destination array to write address
4. set count of DMA to size of destination array
5. set ring size and applies it to read address
6. enable and trigger DMA channel 0
7. wait
8. check contents of destination array

the upython codes as below, but I didn't get the right results I expected, and i get different results every time I run it.
where is wrong in my code?
anyone can help? thanks a lot.

#Credit : Roberthh
#https://forum.micropython.org/viewtopic.php?f=21&t=9697&start=10#p55104
import uctypes, array
from time import sleep

@micropython.viper
def Dma32(read_addr, write_addr, count:uint, ring_size:uint):
  channel          = uint(0)
  DMA_BASE         = const(0x50000000)
  READ_ADDR        = const(0)
  WRITE_ADDR       = const(1)
  TRANS_COUNT      = const(2)
  CTRL_TRIG        = const(3)
  AL1_CTRL         = const(4)
  dma              = ptr32(uint(DMA_BASE) + channel * 0x40)
  dma[READ_ADDR]   = uint(ptr32(read_addr))              # Buffer to read
  dma[WRITE_ADDR]  = uint(ptr32(write_addr))             # Where to write to
  dma[TRANS_COUNT] = count                			  # Items to transfer
  IRQ_QUIET        = const(0x1)                       # No interrupt
  TREQ_SEL         = const(0x3f)                      # unpaced transfer
  CHAIN_TO         = const(0)                         # Do not chain
  RING_SEL         = const(0)
  RING_SIZE        = ring_size                        # wrapping  
  INCR_WRITE       = const(1)                         # For write to array
  INCR_READ        = const(1)                         # For read from array
  DATA_SIZE        = const(2)                         # 32-bit transfer
  HIGH_PRIORITY    = const(1)                         # High priority
  ENABLE           = const(1)                         # Enabled
  TRIG             = ((IRQ_QUIET     << 21) |
                           (TREQ_SEL      << 15) |
                           (CHAIN_TO      << 11) |
                           (RING_SEL      << 10) |
                           (RING_SIZE     <<  9) |
                           (INCR_WRITE    <<  5) |
                           (INCR_READ     <<  4) |
                           (DATA_SIZE     <<  2) |
                           (HIGH_PRIORITY <<  1) |
                           (ENABLE        <<  0))
  dma[CTRL_TRIG]   = uint(TRIG)

def ring_test():
    from os import urandom as random
    COUNT = 128
    Type = ['L', 'H', 'B']
    type_size = [4, 2, 1]
    ring_size = [9, 8, 7]
    for x in range(3):
        src_buffer = array.array(Type[x], (int.from_bytes(random(type_size[x]),'little') for _ in range(COUNT)))
        dst_buffer = array.array(Type[x], (0 for _ in range(COUNT*2)))
        
        print(src_buffer)
        print(dst_buffer)
        
        
        Dma32(src_buffer, dst_buffer, (COUNT*2), ring_size[x])
        sleep(1)
        print(dst_buffer)
        for i in range(COUNT):
            if src_buffer[i] != dst_buffer[i]:
                print(f'{Type[x]} copy test is failed at {i}!, {src_buffer[i]} != {dst_buffer[i]}')
                return
        for i in range(COUNT):
            if src_buffer[i] != dst_buffer[i+COUNT]:
                print(f'{Type[x]} copy test is failed! at {i+COUNT}, {src_buffer[i]} != {dst_buffer[i+COUNT]}')
                return
        print(f'{Type[x]} copy test finished successfully!')
        
ring_test()

[robert-hh]

Since your data size is 32bit (4 bytes), the source and destination addresses must be aligned to a 4 byte boundary, the lower two bits of the address must be 0. Are you sure that you want to do 32bit transfers? Maybe set data size to 0, to make single byte transfers.
The example you refer to was to communicate with the PIO, which expects 32bit words.

[HarleyYan]

Thanks for your reply.
Yes, I want to do 32bits transfer, and I saw the addresses of source and destination buffer is OK, so I think the address isn't cause of this issue.

[rkompass]

@HarleyYan Have you been successful?
If not, could you add something like

    dma_addr = 0x50000000 + chan * 0x40
    src_addr = machine.mem32[dma_addr]
    dst_addr = machine.mem32[dma_addr+4]
    tr_cnt = machine.mem32[dma_addr+8]

before triggerting the dma with dma[CTRL_TRIG] = uint(TRIG)
and

    dma_ctrl = machine.mem32[dma_addr+16]

after that?
Printing these values out we could check and compare them.

[HarleyYan]

I haven't solved it yet.
I added your logs to my code as below:

#Credit : Roberthh
#https://forum.micropython.org/viewtopic.php?f=21&t=9697&start=10#p55104
import uctypes, array
from time import sleep


DMA_BASE         = const(0x50000000)
READ_ADDR        = const(0)
WRITE_ADDR       = const(1)
TRANS_COUNT      = const(2)
CTRL_TRIG        = const(3)
AL1_CTRL         = const(4)

  
@micropython.viper
def Dma32(read_addr, write_addr, count:uint):
  channel          = uint(0)
  dma              = ptr32(uint(DMA_BASE) + channel * 0x40)
  dma[READ_ADDR]   = uint(ptr32(read_addr))              # Buffer to read
  dma[WRITE_ADDR]  = uint(ptr32(write_addr))             # Where to write to
  dma[TRANS_COUNT] = count                			  # Items to transfer

@micropython.viper
def Dma32_trigger(ring_size:uint):
  channel          = uint(0)
  dma              = ptr32(uint(DMA_BASE) + channel * 0x40)
  IRQ_QUIET        = const(0x1)                       # No interrupt
  TREQ_SEL         = const(0x3f)                      # unpaced transfer
  CHAIN_TO         = const(0)                         # Do not chain
  RING_SEL         = const(0)
  RING_SIZE        = ring_size                        # wrapping  
  INCR_WRITE       = const(1)                         # For write to array
  INCR_READ        = const(1)                         # For read from array
  DATA_SIZE        = const(2)                         # 32-bit transfer
  HIGH_PRIORITY    = const(1)                         # High priority
  ENABLE           = const(1)                         # Enabled
  TRIG             = ((IRQ_QUIET     << 21) |
                           (TREQ_SEL      << 15) |
                           (CHAIN_TO      << 11) |
                           (RING_SEL      << 10) |
                           (RING_SIZE     <<  9) |
                           (INCR_WRITE    <<  5) |
                           (INCR_READ     <<  4) |
                           (DATA_SIZE     <<  2) |
                           (HIGH_PRIORITY <<  1) |
                           (ENABLE        <<  0))
  dma[CTRL_TRIG]   = uint(TRIG)

def ring_test():
    from os import urandom as random
    COUNT = 128
    Type = ['L', 'H', 'B']
    type_size = [4, 2, 1]
    ring_size = [9, 8, 7]
    for x in range(3):
        src_buffer = array.array(Type[x], (int.from_bytes(random(type_size[x]),'little') for _ in range(COUNT)))
        dst_buffer = array.array(Type[x], (0 for _ in range(COUNT*2)))
        
        print(src_buffer)
        print(dst_buffer)
        
        chan = 0
        Dma32(src_buffer, dst_buffer, (COUNT*2))
        dma_addr = 0x50000000 + chan * 0x40
        src_addr = machine.mem32[dma_addr]
        dst_addr = machine.mem32[dma_addr+4]
        tr_cnt = machine.mem32[dma_addr+8]
        print(f'dma_addr:{dma_addr:08x}, src_addr:{src_addr:08x}, dst_addr:{dst_addr:08x}, tr_cnt:{tr_cnt:08x}')
        Dma32_trigger(ring_size[x])
        dma_ctrl = machine.mem32[dma_addr+16]
        print(f'dma_ctrl:{dma_ctrl:08x}')
        sleep(1)
        print(dst_buffer)
        for i in range(COUNT):
            if src_buffer[i] != dst_buffer[i]:
                print(f'{Type[x]} copy test is failed at {i}!, {src_buffer[i]} != {dst_buffer[i]}')
                return
        for i in range(COUNT):
            if src_buffer[i] != dst_buffer[i+COUNT]:
                print(f'{Type[x]} copy test is failed! at {i+COUNT}, {src_buffer[i]} != {dst_buffer[i+COUNT]}')
                return
        print(f'{Type[x]} copy test finished successfully!')
        
ring_test()

and I get following log:

dma_addr:50000000, src_addr:2000bf90, dst_addr:2000c1d0, tr_cnt:00000000
dma_ctrl:003f923b

I holp it's useful, thanks for your help!

[rkompass]

@HarleyYan: (RING_SIZE << 9) in the CTRL word was one culprit. It messed up the bits above.
I changed to (RING_SIZE << 6) | # (RING_SIZE << 9) | # !!!! .
Another culprit was the missing alignment of the read array.
You have to consider that with a given ring size n only the n bits of the address change.
But the read array is not aligned to that n - bit boundary!
As a consequence earlier than expected these bits change to zero and the read is from an address that is before the start of the array.
I changed your last program slightly to demonstrate this.

#Credit : Roberthh
#https://forum.micropython.org/viewtopic.php?f=21&t=9697&start=10#p55104
import uctypes, array
from time import sleep
from os import urandom as random

DMA_CHAN         = const(1)
DMA_BASE         = const(0x50000000)
READ_ADDR        = const(0)
WRITE_ADDR       = const(1)
TRANS_COUNT      = const(2)
CTRL_TRIG        = const(3)
AL1_CTRL         = const(4)

  
@micropython.viper
def Dma32(read_addr, write_addr, count:uint):
  dma              = ptr32(uint(DMA_BASE) + DMA_CHAN * 0x40)
  print(f'DMA_ADDR:{uint(dma):08x}, READ_ADDR:{uint(ptr32(read_addr)):08x}, WRITE_ADDR:{uint(ptr32(write_addr)):08x}, TRANS_COUNT:{count:08x}')
  dma[READ_ADDR]   = uint(ptr32(read_addr))              # Buffer to read
  dma[WRITE_ADDR]  = uint(ptr32(write_addr))             # Where to write to
  dma[TRANS_COUNT] = count                               # Items to transfer

@micropython.viper
def Dma32_trigger(ring_size:uint):
  dma              = ptr32(uint(DMA_BASE) + DMA_CHAN * 0x40)
  IRQ_QUIET        = const(0x1)                       # No interrupt
  TREQ_SEL         = const(0x3f)                      # unpaced transfer
  CHAIN_TO         = const(0)                         # Do not chain
  RING_SEL         = const(0)                                           #  0 -> read addresses are wrapped around (1 << RING_SIZE) boundary
  RING_SIZE        = ring_size                        # wrapping  
  INCR_WRITE       = const(1)                         # For write to array
  INCR_READ        = const(1)                         # For read from array
  DATA_SIZE        = const(2)                         # 32-bit transfer
  HIGH_PRIORITY    = const(1)                         # High priority
  ENABLE           = const(1)                         # Enabled
  TRIG             = ((IRQ_QUIET     << 21) |
                           (TREQ_SEL      << 15) |
                           (CHAIN_TO      << 11) |
                           (RING_SEL      << 10) |
                           (RING_SIZE     <<  6) |   # (RING_SIZE     <<  9) |  # !!!! 
                           (INCR_WRITE    <<  5) |
                           (INCR_READ     <<  4) |
                           (DATA_SIZE     <<  2) |
                           (HIGH_PRIORITY <<  1) |
                           (ENABLE        <<  0))
  print(f'CTRL_TRIG:{uint(TRIG):08x}')
  dma[CTRL_TRIG]   = uint(TRIG)


COUNT = 128
Type = ['L', 'H', 'B']
type_size = [4, 2, 1]
ring_size = [9, 8, 7]
Break_Flag = False

for x in range(3):
    src_buffer = array.array(Type[x], (int.from_bytes(random(type_size[x]),'little') for _ in range(COUNT)))
    dst_buffer = array.array(Type[x], (0 for _ in range(COUNT*2)))
    
    print(src_buffer)
    print(dst_buffer)
    
    Dma32(src_buffer, dst_buffer, (COUNT*2))
    dma_addr = 0x50000000 + DMA_CHAN * 0x40
    src_addr = machine.mem32[dma_addr]
    dst_addr = machine.mem32[dma_addr+4]
    tr_cnt = machine.mem32[dma_addr+8]
    print(f'dma_addr:{dma_addr:08x}, src_addr:{src_addr:08x}, dst_addr:{dst_addr:08x}, tr_cnt:{tr_cnt:08x}')
    Dma32_trigger(ring_size[x])
    dma_ctrl = machine.mem32[dma_addr+16]
    print(f'dma_ctrl:{dma_ctrl:08x}')
    sleep(1)
    print(dst_buffer)
    for i in range(COUNT):
        if src_buffer[i] != dst_buffer[i]:
            print(f'Type {Type[x]} copy test failed at i={i}: Read address {src_addr + type_size[x]*i:08x}: {src_buffer[i]} != {dst_buffer[i]}')
            Break_Flag = True
            break
    for i in range(COUNT):
        if src_buffer[i] != dst_buffer[i+COUNT]:
            print(f'Type {Type[x]} copy test failed! at i={i+COUNT}: Read address {src_addr + type_size[x]*(i+COUNT):08x}: {src_buffer[i]} != {dst_buffer[i+COUNT]}')
            Break_Flag = True
            break
    if Break_Flag:
        break
    print(f'{Type[x]} copy test finished successfully!')

Output:

. . .
DMA_ADDR:50000040, READ_ADDR:2000c120, WRITE_ADDR:2000c320, TRANS_COUNT:00000100
dma_addr:50000040, src_addr:2000c120, dst_addr:2000c320, tr_cnt:00000000
CTRL_TRIG:003f827b
dma_ctrl:003f827b
. . . 
Type L copy test failed at i=56: Read address 2000c200: 1087510192 != 268656308
Type L copy test failed! at i=184: Read address 2000c400: 1087510192 != 268656308

The first failed read is at 0x2000c200. The DMA read at 0x2000c000 instead of 0x2000c200.