Apply uctypes changes in one step

[webdeb]

Hey guys, I would like to change more than one uctypes values at the same time, and because potential misconfiguration which is propagated immediately to the registers and is not in sync with other uctypes settings it could potentially damage some hardware.

As a simple example to demonstrate the issue is a mosfet H bridge driver which needs a guaranteed dead time. So by changing the calculated values one after each other could create a short circuit. And I would like to prevent it in my logic.

I think there is a way to use the mem module directly, but if this could somehow be done via uctypes, would be very nice.

What I thought, maybe there is a way to have a virtual uctypes copy, change the values, and then apply the virtual structure at once.

Code explanation based on the official docs example:

# Access to CPU registers. Subset of STM32F4xx WWDG block
WWDG_LAYOUT = {
    "WWDG_CR": (0, {
        "WDGA": 7 << uctypes.BF_POS | 1 << uctypes.BF_LEN | uctypes.BFUINT32,
    }),
    "WWDG_CFR": (4, {
        "WDGTB": 7 << uctypes.BF_POS | 2 << uctypes.BF_LEN | uctypes.BFUINT32,
    }),
}

WWDG = uctypes.struct(0x40002c00, WWDG_LAYOUT)


"""

!!! The changes to WDGTB and WDGA Must be in sync!!! <----------------------

"""
WWDG.WWDG_CFR.WDGTB = 0b10
WWDG.WWDG_CR.WDGA = 1

[2dof]

I think accessing via registers and creating masks will be simplest solution, but via uctypes.struct will be more user friendly.

see this example (very simple)

TRIG_FIELDS = {
    "f0":   0<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f1":   1<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f2":   2<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f3":   3<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f4":   4<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f5":   5<<BF_POS | 1<<BF_LEN | BFUINT8,
    "f6":   6<<BF_POS | 2<<BF_LEN | BFUINT8,
    #"f7":   7<<BF_POS | 1<<BF_LEN | BFUINT8, 
}
REGS = {
    "CTRL_TRIG_REG":       0x00|UINT8,
    "CTRL_TRIG":          (0x00,TRIG_FIELDS)
}

buf1 =bytearray(1) # create register
struct1 = uctypes.struct(uctypes.addressof(buf1), REGS, uctypes.LITTLE_ENDIAN)

#change  bits by names
struct1.CTRL_TRIG.f0=1
struct1.CTRL_TRIG.f6=0b11
# or by bytes
struct1.CTRL_TRIG_REG = 0b11000001
 
print(bin(struct1.CTRL_TRIG_REG))

TRIG_FIELDS : dict description of field ( in your example WWDG_LAYOUT )
but next in REGS I create a bit fields with accessing by my TRIG_FIELDS (CTRL_TRIG)
and additionally access by direct byte value (CTnRL_TRIG_REG) :
struct1.CTRL_TRIG_REG = 0b11000001 -> just equivalent of mem32 via registers with masks .
But if we consider struct1 as our virtual hardware register then we can just set-up bits and using mem32 write values as bytes (struct1.CTRL_TRIG_REG) to the real one ( and vice versa) - just like you want.

[webdeb]

Well, that what I meant with the mem module (mem32)

But in my case, I would need to write 112 bytes of the PWM Registry of the PICO. (Have to configure multiple pwm channels at once, since they are related to each other) and it would be nice to do in a more descriptive way. Maybe there is a way to create such a mask which works with the uctypes layout structure?

[webdeb]

Ah, wait a minute, I apologies, you already gave the answer, but I did't get it first. However, is it somehow possible to write to all 112 bytes of the PWM registry at once, I guess not? ))

[webdeb]

Well, if not, I think the solution is to just stop the PWMs, apply changes & start again. this will also work ))

[robert-hh]

There are discussion #10817 and PR #10850 about the PWM implementations at various ports and how to harmonize that. There is a sub-thread in that discussion about H-Bridge support. At the moment, that is best supported by the mimxrt port (Teensy 4.x as example), which allows to specify pin pair for complementary signals and fine control the dead time between pins, where both pins are off. In principle, complementary operation is supported by all MCU's which can have synchronouse PWM outputs at different polarity and duty cycle. As far as I can tell, this to some extend in additition to the MIMXRT port supported by MP for the ports RP2, SAMD, NRF and ESP32. The first three allow to stop and restart these synchronous output at the same time by e.g. controlling the freq setting.

The aspect which is not settled yet is the state of the pins when PWM is stopped. So for now it's up to the users Python code to set the Pin as required, which is slower than C code.

[webdeb]

Thank you Robert, but unfortunately I cannot rely on freq, because I need multiple signals, which are going in lock step, so, f1 = 10, f2 = 20, 30,100.. or f1=111, f2=222,333.. etc. And because the freq is rounded, I cannot rely on it, I have to manage the top values myself via registers.

[webdeb]

Btw, thank you for pointing out mimxrt features, I wish I knew it earlier, maybe I'll come back to it 👍