DMA with multiple A/D channels

[AttilaTheHunBruce]

I'm thinking about building a software defined radio using a Raspberry Pi Pico (plus oscillators and mixers). I'd process two input streams (I&Q) read from two A/D channels and use DMA to grab the signals from the A/D converter and store them in memory.

The A/D converter will process channels in a round robin fashion, so if I'm using two channels the samples would be placed in adjacent memory locations:
memory -> ch0 ch1 ch0 ch1 ch0 ch1 ...

Is there any way to not interleave the data so that I have I in one array and Q in another?

tia for your help,
Bruce

[rkompass]

One way: You would have to set up 3 DMA channels. One for left, one for right, both from ADC to the different memory locations, 1-word transfer, not starting yet. The third channel would alternate between sending a trigger signal to the first and the second channel. This channel would be triggered by the ADC conversion. It should be feasible although I'm not sure about the third channel yet, perhaps you need a fourth channel to send the different DMA register addresses that the third channel targets to this channel. You have to consult the datasheet.

[AttilaTheHunBruce]

Thank you for the suggestion. I'm new to using DMA. I assume this would involve reprogramming the destination register after every A/D read. I'll look into that. Thanks again.

[rkompass]

I assume this would involve reprogramming the destination register after every A/D read.

This was my first thought too. But then you would not only have to reprogram it after each A/D read to the two different memory locations but also to increase the counters within the respective arrays accordingly. Which you cannot achieve with DMA easily, provided you are not willing to set up an extra array containing only the respective addresses (A, B, A+1,m, B+1, A+2, ...).

We have quite a few DMA channels. So better have different channels for A and B, then the independent counting is solved. You need to trigger a read from ADC intermittently by DMA-A and DMA-B, which may be set up to happen when the config or the counter register of those DMA's is written to. (To be more precise: There are alternative addresses of the config and counter registers that include the triggering when they are written to). So the same value needs to be written alternately to a certain register of DMA-A and DMA-B. Which both are not adjacent in memory. Therefore set up DMA-3 which writes always this same source value, but to these different destinations. Set it up so that it is triggered when the destination register is written to. (To be more precise: There is an alternative address of the destination register that includes the triggering when it is written to). What you still need is to write the destinations for DMA-A and DMA-B interchangeably into that address. This then is done by DMA-4. DMA-4 may be attached to the sampling of the ADC-channel. It reads from an array of size 2 containing the addresses of the registers triggering DMA-A and DMA-B and is set up to count to a pre-set value, but uses addresses modulo this array size 2. This way you alternately write out the two different addresses to DMA-3, which immediately triggers reading from the ADC either by DMA-A or DMA-B.

[AttilaTheHunBruce]

Thanks again. This will be in interesting logistical challenge to program, but I think it will work.