Can't find a configuration for Cortex-M3 that enables native and viper

[rkompass]

In building Roberts Winner w600 port I gave up experimenting with different emitter switches in 'mpconfigport.h'
I have the feeling now that I need rare expert advice :-) @jimmo ???

The w600 is an ARM Cortex-M3 cpu.
In 'py/mpconfig.h' there is

// Convenience definition for whether any native emitter is enabled
#define MICROPY_EMIT_NATIVE (MICROPY_EMIT_X64 || MICROPY_EMIT_X86 || MICROPY_EMIT_THUMB || MICROPY_EMIT_ARM || MICROPY_EMIT_XTENSA || MICROPY_EMIT_XTENSAWIN)

from which I deduced that I have to enable MICROPY_EMIT_THUMB or MICROPY_EMIT_ARM.
If I do so I don't get error reports on importing a @micropython.viper function any longer but executing such a function now stalls.
In my 'mpconfigport.h' I have for example:

// MicroPython emitters
// #define MICROPY_EMIT_ARM                    (1)
#define MICROPY_EMIT_THUMB                  (1)
#define MICROPY_EMIT_INLINE_THUMB           (1)
#define MICROPY_EMIT_THUMB_ARMV7M           (0)

What is missing here?

[jimmo]

In MicroPython, THUMB ARMv6-M and ARMv7-M (i.e. ARM Cortex), and ARM is "classic" ARMv6 (i.e. ARM 32-bit).
The Cortex M3 is v7-M.

So you want

#define MICROPY_EMIT_ARM                    (0)
#define MICROPY_EMIT_THUMB                  (1)
#define MICROPY_EMIT_INLINE_THUMB           (1)
#define MICROPY_EMIT_THUMB_ARMV7M           (1)

I don't have a w600, but we do have a M3 target supported by the qemu-arm port (try BOARD=netduino2). This definitely can run @viper and @native code (easy to test by modifying qemu-arm/main.c).

Does @native work? Is it just @viper that doesn't?

If @native doesn't work either then my guess would be some sort of memory management configuration where the CPU is refusing to execute code from RAM. So I would start with:
https://github.com/micropython/micropython/blob/master/py/mpconfig.h#L1846 (does your port override this? see e.g. the stm32 version for what you need to do on Cortex M)
and
https://github.com/micropython/micropython/blob/master/py/mpconfig.h#L1853 (if only certain areas of RAM are executable, then you need to override this). You may also want to look into MP_PLAT_COMMIT_EXEC.

[jimmo]

To your specific question in the other thread about combining MICROPY_EMIT_THUMB and MICROPY_EMIT_THUMB_ARMV7M see https://github.com/micropython/micropython/blob/master/py/mpconfig.h#L354

(MICROPY_EMIT_THUMB without MICROPY_EMIT_THUMB_ARMV7M means v6-M, e.g. Cortex M0)

[rkompass]

Than you for the fast reply.
I used the above combination and it still stalls.
I checked now that the viper code is compiled.

@micropython.viper
def add2(x:int)-> int:
    return x+2

def inspect(f, nbytes=16):
    import machine
    import array
    import ubinascii
    @micropython.asm_thumb
    def dummy1():
        pass
    @micropython.viper
    def dummy2() -> int:
        return 0
    if type(f) != type(dummy1) and type(f) != type(dummy2):
        raise ValueError('expecting an inline-assembler or viper function')
    baddr = bytes(array.array('O', [f]))
    addr = int.from_bytes(baddr, 'little')
    print('function object at: 0x%08x' % addr)
    print('number of args: %u' % machine.mem32[addr + 4])
    code_addr = machine.mem32[addr + 12]
    print('machine code at: 0x%08x' % code_addr)  # seems to fit even with viper : code begins with 'FE B5' and ends with 'FE BD'
    print('-- code --')
    for i in range(nbytes):
        print('%02x' % machine.mem8[code_addr + i], end='')
    print('\n----------')

inspect(add2, 100)

gives:

function object at: 0x2001b240
number of args: 536982016
machine code at: 0x2001bf40
-- code --
feb54768ff687f69084611461e46002940f004800122904200f0078040f20202c0f20202d7f8b030984730680221fb6898470446022221468918084602213b69984700f000b8febd0000000000000000f2b5f2bd000000000000000000000000f2b54768
----------

which is disassembled to:

0x0000000000000000:  FE B5          push  {r1, r2, r3, r4, r5, r6, r7, lr}
0x0000000000000002:  47 68          ldr   r7, [r0, #4]
0x0000000000000004:  FF 68          ldr   r7, [r7, #0xc]
0x0000000000000006:  7F 69          ldr   r7, [r7, #0x14]
0x0000000000000008:  08 46          mov   r0, r1
0x000000000000000a:  11 46          mov   r1, r2
0x000000000000000c:  1E 46          mov   r6, r3
0x000000000000000e:  00 29          cmp   r1, #0
0x0000000000000010:  40 F0 04 80    bne.w #0x1c
0x0000000000000014:  01 22          movs  r2, #1
0x0000000000000016:  90 42          cmp   r0, r2
0x0000000000000018:  00 F0 07 80    beq.w #0x2a
0x000000000000001c:  40 F2 02 02    movw  r2, #2
0x0000000000000020:  C0 F2 02 02    movt  r2, #2
0x0000000000000024:  D7 F8 B0 30    ldr.w r3, [r7, #0xb0]
0x0000000000000028:  98 47          blx   r3
0x000000000000002a:  30 68          ldr   r0, [r6]
0x000000000000002c:  02 21          movs  r1, #2
0x000000000000002e:  FB 68          ldr   r3, [r7, #0xc]
0x0000000000000030:  98 47          blx   r3
0x0000000000000032:  04 46          mov   r4, r0
0x0000000000000034:  02 22          movs  r2, #2
0x0000000000000036:  21 46          mov   r1, r4
0x0000000000000038:  89 18          adds  r1, r1, r2
0x000000000000003a:  08 46          mov   r0, r1
0x000000000000003c:  02 21          movs  r1, #2
0x000000000000003e:  3B 69          ldr   r3, [r7, #0x10]
0x0000000000000040:  98 47          blx   r3
0x0000000000000042:  00 F0 00 B8    b.w   #0x46
0x0000000000000046:  FE BD          pop   {r1, r2, r3, r4, r5, r6, r7, pc}

which seems to be correct code (I see the addition of 2).

The RAM area matches too (only the lower 160K RAM are executable), as the Machine code is at position 114496 in RAM.
Thee above lines in 'mpconfig.h' are not changed.

MP_PLAT_COMMIT_EXEC is only present in this context in mpconfig.h

// Whether native relocatable code loaded from .mpy files is explicitly tracked
// so that the GC cannot reclaim it.  Needed on architectures that allocate
// executable memory on the MicroPython heap and don't explicitly track this
// data some other way.
#ifndef MICROPY_PERSISTENT_CODE_TRACK_RELOC_CODE
#if !MICROPY_EMIT_MACHINE_CODE || defined(MP_PLAT_ALLOC_EXEC) || defined(MP_PLAT_COMMIT_EXEC)
#define MICROPY_PERSISTENT_CODE_TRACK_RELOC_CODE (0)
#else
#define MICROPY_PERSISTENT_CODE_TRACK_RELOC_CODE (1)
#endif
#endif

Can there be a configuration in FreeRTOS that prevents execution?

[jimmo]

https://github.com/micropython/micropython/blob/master/py/mpconfig.h#L1846 (does your port override this? see e.g. the stm32 version for what you need to do on Cortex M)

@rkompass Did you check this?

MP_PLAT_COMMIT_EXEC is only present in this context in mpconfig.h

Not sure what you mean by this. If your hardware needs it then you have to implement it. Look at ESP8266 for example.

[rkompass]

https://github.com/micropython/micropython/blob/master/py/mpconfig.h#L1846 (does your port override this? see e.g. the stm32 version for what you need to do on Cortex M)

O.k. I changed:

// #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p)))
#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((uint32_t)(p) | 1))  // we now try this as viper code stalled

in 'mpconfigport.h'

and voilà @viper, @native and @asm_thumb are running!

We might note that neither the 1.10 MP version from Winner nor the older MP 1.19 had these features (I tried both today).

Thank you very much, @jimmo you made me happy.
@robert-hh I'm sure you read this too, to update your nice branch.

If your hardware needs it (MP_PLAT_COMMIT_EXEC) then you have to implement it. Look at ESP8266 for example.

Any short explanation for this?

[robert-hh]

I have followed the conversation. Is this line the only change in mpconfigport.h you made or did you change the emitter section as well?

[rkompass]

This and the 4 lines for emitters suggested by jimmo.--Diese Nachricht wurde von meinem Android Mobiltelefon mit GMX Mail gesendet.Am 26.05.23, 16:46 schrieb Robert Hammelrath ***@***.***>: I have followed the conversation. Is this line the only change in mpconfigport.h you made or did you change the emitter section as well? —Reply to this email directly, view it on GitHub, or unsubscribe.You are receiving this because you were mentioned.Message ID: ***@***.***>

[robert-hh]

The w60x branch is updated. A small test for native, viper and asm code runs well.