I2S confusion support for controller and/or peripheral operation

[saraverbeecke]

Hi,
the docs state: The I2S class supports controller operation. Peripheral operation is not supported. Does this mean that only I2S devices in Master mode are supported (= I2S device generates its own system clock)?

I'm trying to get audio in on an ESP32S3 (ESP-IDF v4.4) through a PCM1808 ADC:

1. should this device be set as a master or slave?
2. should I generate the SCKI with a PWM from the ESP32 at 256*fs (seems to be necessary for both slave or master mode, PWM solution was suggested in the old MicroPython forum, is this reliable enough?)
3. 24-bit data should come out over I2S, is there any way to process the buffer fast containing the 32 bit values (only 32 bit or 16 bit mode is support in the library and it is all little endian I suppose) but needs to be converted to integers for further processing...
4. how do I best separate the L and R channel values?
5. I took a look at the great @miketeachman examples, but still could not figure it out for this ADC.

from machine import Pin, I2S, PWM
from struct import unpack

BUFFER_LENGTH_IN_BYTES = 4096
USER_BUFFER_LENGTH_IN_BYTES = round(BUFFER_LENGTH_IN_BYTES / 4)
RATE = 16_000

pwm = PWM(Pin(1), freq=256*RATE, duty=512) # is this ok ???
i2s = I2S(0, sck=Pin(2), sd=Pin(42), ws=Pin(41), mode=I2S.RX, bits=32, format=I2S.STEREO, rate=RATE, ibuf=BUFFER_LENGTH_IN_BYTES)

samples = memoryview(bytearray(USER_BUFFER_LENGTH_IN_BYTES))

while True:
    num_bytes_read = i2s.readinto(samples) # read samples from the I2S peripheral
    if num_bytes_read > 0:
        print(samples[0:8])
        print(struct.unpack("<ii", samples[0:8])) # trying to understand

Thanks!

[miketeachman]

I took a quick look at the datasheet and it seems like this device should work with the machine.I2S class.

1. The ADC device should be configured in slave mode.
2. Yes. Use machine.PWM to create a 256*fs clock.

To extract 32-bit samples for L/R you'll need to iterate over the data that is read into the bytearray. Here is some untested code that might help. You'll need to add some additional code to test a condition to exit the while loop. The real micropython experts will likely have a better way to do this, but this is a start.

left_samples = []
right_samples = []
while True:
    num_bytes_read = i2s.readinto(samples) # read samples from the I2S peripheral
    for i in range(0, len(samples ), 8):
        left_sample = struct.unpack('<i', samples [i:i+4])[0]  
        left_samples.append(left_sample)
        right_sample = struct.unpack('<i', samples [i+4:i+8])[0]
        right_samples.append(right_sample)

Does this help?

[saraverbeecke]

@miketeachman thanks for the insight that helped a bit but still cannot get a decent data out of the PCM1808. The code you suggest could indeed work (I would also ignore the first byte as the device only supports 24 bit so the first byte contains \x00).
I put the PCM1808 in slave mode and in I2S format (FMT, MD0, MD1 pins connected to ground with a 10k). Also added the suggested decoupling caps on the VCC, VDD and Vref rails. Then I applied the PWM at to create a 256fs clock. The PWM frequency is not exact 256fs as you know. Using an exact PWM frequency of 256*fs also does not help.

I always get full scale, zero or random data on the L/R channels...

Anything you can think of I forgot?
Is it an option to set the device in master mode with a separate clock circuit with crystal and use the SCK and WS as outputs?

[miketeachman]

Sorry, not having used this device I'm struggling to offer other insights. Do you have access to an oscilloscope to verify the various inputs, like master clock, sck, and ws? I often consult the schematic of the evaluation board for ideas. Or, potentially purchase the evaluation board?

[frohro]

I am an absolute newby on writing PIO, (never wrote any PIO at all) but it looks to me like creating the master clock I need would only entail changing the 32 bit write PIO in machine_i2s.c, as all we are doing is creating a clock that is synchronous with the others. BCK is 1/4 as fast as the SCKI master clock we need, so it looks like we could make the base frequency of the state machine to be four times as high as it now is. Then we need to adjust the delays and add nop instructions with the appropriate delays so everything fires at the right time with the faster clock. The new clock signal could be added to the .side(...) statements so it is output on the next GPIO Pin. I have my board soldered this way.

@miketeachman, it looks like you are the author of machine_i2s.c. Is there any chance you could help me try this out? Am I missing something important? It looks like we would have enough instructions (especially as I only need 32-bit receive). It seems like it would be a good step in the direction of improving the I2S for the RP2 micropython.

[miketeachman]

Perhaps the existing MicroPython API for the PIO could be used to create the master clock signal on an output pin? With a PIO I expect that it's possible to create a clock signal synchronous to the I2S signals, which were created using a PIO. This approach would be simpler than a change to the source code.

[frohro]

I did some more work on this and discovered an anomaly in the BCK. Here is what it looks like.

The code is the same as I used above. You can see where sometimes it looks like it takes about 8ns more per pulse than at other times. This seems like a problem.
I did some more reading, and it is because of the fractional PLL divider. I don't know how much jitter is permissible for the PCM1808, but some is to be expected due to the fractional PLL divider.

[robert-hh]

Fractional division chimes in if the divider isn't an integer. What happens if you run the CPU at 144MHz instead of 125Mhz, using machine.freq()? or 120Mhz?

[frohro]

The jitter is still there for both frequencies.

[frohro]

That may be possible. I like the idea that it does not require messing with the source code. I haven't done enough with PIO to know what problems may occur, in the integration. I am a total newby to PIO, but as I understand it, the IO pins are picked and the clock set at the same time the PIO is created. Can you provide any direction on how to make a separate PIO program run on a contiguous pin and in synchronism with the one created by the I2S micropython instance? Can you modify a PIO with a separate program in a way to create a new synchronous clock? If so, how? Thanks for the idea?

[miketeachman]

Can you provide any direction on how to make a separate PIO program run on a contiguous pin and in synchronism with the one created by the I2S micropython instance?

There is a blink example that would be a good starting point.

[frohro]

Here is a little progress. By using one of the PIO (only one works for this), I was able to get a master bit clock that is four times the frequency of BCK and it is synchronized with BCK.

There is no data, though. Everything reads zeros.
`
from machine import Pin, I2S, PWM
import struct

BUFFER_LENGTH_IN_BYTES = 4096
USER_BUFFER_LENGTH_IN_BYTES = round(BUFFER_LENGTH_IN_BYTES / 4)
RATE = 48000

@rp2.asm_pio(set_init=rp2.PIO.OUT_LOW)
def blink():
wrap_target()
set(pins, 1)
set(pins, 0)
wrap()

sm = rp2.StateMachine(0, blink, freq=480002562, set_base=Pin(3))
sm.active(1)
i2s = I2S(0, sck=Pin(0), sd=Pin(2), ws=Pin(1), mode=I2S.RX, bits=32, format=I2S.STEREO, rate=RATE, ibuf=BUFFER_LENGTH_IN_BYTES)

samples = memoryview(bytearray(USER_BUFFER_LENGTH_IN_BYTES))

left_samples = []
right_samples = []
while True:
num_bytes_read = i2s.readinto(samples) # read samples from the I2S peripheral
for i in range(0, len(samples ), 8):
left_sample = struct.unpack('<i', samples [i:i+4])[0]
left_samples.append(left_sample)
right_sample = struct.unpack('<i', samples [i+4:i+8])[0]
right_samples.append(right_sample)
print('L: ', left_sample, ' R: ', right_sample)
`

[robert-hh]

Note: to maintain code formatting, put it between lines of three backticks ```. For convenience, highlight the code and push Ctrl-E. You can as well indent the code lines by one tab to keep the formatting.

[robert-hh]

I get a similar picture with your code. In the sample code, the PIO frequency seems wrong. I had to use freq=24_576_000. Screen shot below. In the statistics you see in the histogram the alternating frequencies. The two clocks are synchronous once started, but not at the same phase for every start.

[frohro]

Thanks for the tip about posting code. I wondered what was up. I'll try it next time I try and post code.

[frohro]

@miketeachman, I don't like the jitter I am getting with the RP2 and am considering modifications of my hardware design to include a SKCI clock. This would require making the PCM1808 master and would give me an accurate jitter free 24.576 MHz or 12.288 MHz clock which would help solve other synchronization issues as well. The hardware cost could be quite minimal, but I am wondering about the software effort if the RP2 is no longer supplying the clocks. I am trying to make this work with micropython, because my intended audience will benefit significantly. Can you estimate how difficult it would be to make the software for I2S work in slave mode?
Thanks!
Rob

[miketeachman]

Can you estimate how difficult it would be to make the software for I2S work in slave mode?

Sorry, I don't have an estimate. It's not trivial for sure.

Is there a reason you need to use this particular ADC (or any ADC with a master clock)? If you switched to a INMP441 device you won't have these issues as it doesn't need a master clock.

[frohro]

Thanks @miketeachman. That is helpful. I need a good audio ADC as I am building an SDR receiver. In the past, I used a USB audio card connected to the host computer. With the ADC on the SDR board, it could be placed near the antenna, and the host could be anywhere connected via WIFI. These days, computers don't come with stereo audio inputs. Having the ADC on the SDR board is cheaper, and eliminates things that have to hang off the host computer, like the sound card.