I2S Master clock output from PWM reliability? #11866
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Hi, I'm experimenting with an ADC (PCM1808) and a codec (PCM3060) which both require a master system clock when in slave mode (currently only slave mode is supported as I understand from the MicroPython docs about I2S). As mentioned in other forum/discussion posts, it should possible to generate that clock by running a PWM signal on a GPIO. |
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The PWM can be used for MCK generation. When I used it, the MCK clocked the internal logic of the codec and had not to be in sync with the audio clocks. The ESP32 PWM can create stable frequencies, if the ratio between the ESP32 internal 160Mhz and the PWM signal is an integer. 8MHz is fine, 12Mhz will be a mix of two frequencies. |
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The PWM can be used for MCK generation. When I used it, the MCK clocked the internal logic of the codec and had not to be in sync with the audio clocks. The ESP32 PWM can create stable frequencies, if the ratio between the ESP32 internal 160Mhz and the PWM signal is an integer. 8MHz is fine, 12Mhz will be a mix of two frequencies.
8MHz PWM:
12 MHZ PWM