Updated each section's .rst file with subsections

MustafaAbdaal · MustafaAbdaal · commit 653b91413182 · 2024-11-01T01:29:32.000+05:00
Subsections were added to the following sections: Setting up .RPE Project, FPGA input, SoC input, Analyzing Results. For now subsections will not be needed on Peripheral Usage &amp; Memory Usage sections.
diff --git a/docs/source/index.rst b/docs/source/index.rst
@@ -1,16 +1,17 @@
+=================================================
 Welcome to Rapid Power Estimator's Documentation!
 =================================================
 
 Overview
-============
+###########
 
 Power and thermal specifications are critical considerations in the early stages of designing SoCs and FPGAs. Determining accurate power requirements and cooling solutions is essential to avoid over-designing or under-designing your product's power and thermal systems. It is a valuable tool in this process.
 
 RPE allows you to estimate power consumption at various stages of your design cycle. It simplifies the input of design information through intuitive wizards and delivers comprehensive power and thermal data analysis.
 
 
 Contents
-========
+#########
 
 .. toctree::
    :maxdepth: 2
@@ -23,8 +24,8 @@ Contents
    installation
    api_reference
 
-Indices and tables
-==================
+Indices and Tables
+###################
 
 * :ref:`genindex`
 * :ref:`modindex`
diff --git a/docs/source/user_guide/FPGA.rst b/docs/source/user_guide/FPGA.rst
@@ -1,4 +1,20 @@
+=============
 FPGA Input
 =============
 
-This section will document FPGA inpout for Rapid Power Estimator.
+This section will document FPGA input for Rapid Power Estimator.
+
+Clocking
+#########
+
+FLE - Functional Logic Element 
+###############################
+
+BRAM - Block Randon Access Memory 
+##################################
+
+DSP - Digital Signal Processor
+###############################
+
+IO - Input/Output
+##################
diff --git a/docs/source/user_guide/SoC.rst b/docs/source/user_guide/SoC.rst
@@ -1,4 +1,17 @@
+=============
 SoC Input
 =============
 
 This section will document SoC input for Rapid Power Estimator.
+
+BCPU - Boot Central Processing Unit
+#######################################
+
+ACPU - Application Central Processing Unit
+###########################################
+
+DMA - Direct Memory Access
+###########################
+
+Connectivity
+############
diff --git a/docs/source/user_guide/index.rst b/docs/source/user_guide/index.rst
@@ -1,13 +1,14 @@
+==========
 User Guide
-=====
+==========
 
 
 .. toctree::
    :maxdepth: 2
    :caption: Table of Contents
 
    introduction
-   launch
+   setup
    FPGA 
    SoC
    peripherals
diff --git a/docs/source/user_guide/introduction.rst b/docs/source/user_guide/introduction.rst
@@ -1,4 +1,6 @@
-Introduction to Rapid Power Estimator
-=============
+====================
+Introduction to RPE
+====================
 
 This section will document the Introduction of Rapid Power Estimator.
+
diff --git a/docs/source/user_guide/peripherals.rst b/docs/source/user_guide/peripherals.rst
@@ -1,4 +1,5 @@
+================
 Peripheral Usage
-=============
+================
 
 This section will document peripherals on Rapid Power Estimator.
diff --git a/docs/source/user_guide/results.rst b/docs/source/user_guide/results.rst
@@ -1,4 +1,14 @@
+====================
 Analyzing Results
-=============
+====================
 
 This section will document the results on Rapid Power Estimator.
+
+FPGA Complex & Core Power
+#########################
+
+Processing Complex (SoC) Power
+##############################
+
+Overall Typical & Worst Case Power 
+##################################
diff --git a/docs/source/user_guide/setup.rst b/docs/source/user_guide/setup.rst
@@ -0,0 +1,11 @@
+=======================
+Setting up .RPE Project
+=======================
+
+This section will document how to setup a project on Rapid Power Estimator.
+
+Project Creation
+#################
+
+Device Selection
+#################
