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Commit f54ab5b

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prima thread safety
Signed-off-by: James Cherry <[email protected]>
1 parent b51885a commit f54ab5b

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2 files changed

+22
-14
lines changed

2 files changed

+22
-14
lines changed

include/sta/Liberty.hh

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
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#pragma once
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#include <mutex>
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#include "MinMax.hh"
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#include "RiseFallMinMax.hh"
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#include "ConcreteLibrary.hh"
@@ -628,6 +630,7 @@ protected:
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LibertyPgPortMap pg_port_map_;
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bool has_internal_ports_;
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bool have_voltage_waveforms_;
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std::mutex waveform_lock_;
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private:
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friend class LibertyLibrary;

liberty/Liberty.cc

Lines changed: 19 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
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#include "Liberty.hh"
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#include "Mutex.hh"
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#include "EnumNameMap.hh"
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#include "Report.hh"
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#include "Debug.hh"
@@ -1963,24 +1964,28 @@ void
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LibertyCell::ensureVoltageWaveforms(const DcalcAnalysisPtSeq &dcalc_aps)
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{
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if (!have_voltage_waveforms_) {
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float vdd = 0.0; // shutup gcc
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bool vdd_exists;
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liberty_library_->supplyVoltage("VDD", vdd, vdd_exists);
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if (!vdd_exists || vdd == 0.0)
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criticalError(1120, "library missing vdd");
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for (TimingArcSet *arc_set : timingArcSets()) {
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for (TimingArc *arc : arc_set->arcs()) {
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for (const DcalcAnalysisPt *dcalc_ap : dcalc_aps) {
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GateTableModel *model = arc->gateTableModel(dcalc_ap);
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if (model) {
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OutputWaveforms *output_waveforms = model->outputWaveforms();
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if (output_waveforms)
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output_waveforms->ensureVoltageWaveforms(vdd);
1967+
LockGuard lock(waveform_lock_);
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// Recheck with lock.
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if (!have_voltage_waveforms_) {
1970+
float vdd = 0.0; // shutup gcc
1971+
bool vdd_exists;
1972+
liberty_library_->supplyVoltage("VDD", vdd, vdd_exists);
1973+
if (!vdd_exists || vdd == 0.0)
1974+
criticalError(1120, "library missing vdd");
1975+
for (TimingArcSet *arc_set : timingArcSets()) {
1976+
for (TimingArc *arc : arc_set->arcs()) {
1977+
for (const DcalcAnalysisPt *dcalc_ap : dcalc_aps) {
1978+
GateTableModel *model = arc->gateTableModel(dcalc_ap);
1979+
if (model) {
1980+
OutputWaveforms *output_waveforms = model->outputWaveforms();
1981+
if (output_waveforms)
1982+
output_waveforms->ensureVoltageWaveforms(vdd);
1983+
}
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}
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}
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}
1987+
have_voltage_waveforms_ = true;
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}
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have_voltage_waveforms_ = true;
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}
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}
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