@@ -240,10 +240,13 @@ static void next_scr2_rtc_update(NeXTPC *s)
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((scr2_2 & SCR2_RTDATA ) ? 1 : 0 );
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} else {
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/* Shift out value to read */
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+ qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named (
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+ DEVICE (s ), "pc-rtc-data-in" , 0 );
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+
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if (rtc -> retval & (0x80 >> (rtc -> phase - 8 ))) {
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- scr2_2 |= SCR2_RTDATA ;
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+ qemu_irq_raise ( rtc_data_in_irq ) ;
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} else {
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- scr2_2 &= ~ SCR2_RTDATA ;
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+ qemu_irq_lower ( rtc_data_in_irq ) ;
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}
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}
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}
@@ -270,8 +273,6 @@ static void next_scr2_rtc_update(NeXTPC *s)
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rtc -> command = 0 ;
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rtc -> value = 0 ;
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}
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-
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- s -> scr2 = deposit32 (s -> scr2 , 8 , 8 , scr2_2 );
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}
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static uint64_t next_mmio_read (void * opaque , hwaddr addr , unsigned size )
@@ -1001,6 +1002,20 @@ static const MemoryRegionOps next_dummy_en_ops = {
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.endianness = DEVICE_BIG_ENDIAN ,
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};
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+ static void next_pc_rtc_data_in_irq (void * opaque , int n , int level )
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+ {
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+ NeXTPC * s = NEXT_PC (opaque );
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+ uint8_t scr2_2 = extract32 (s -> scr2 , 8 , 8 );
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+
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+ if (level ) {
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+ scr2_2 |= SCR2_RTDATA ;
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+ } else {
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+ scr2_2 &= ~SCR2_RTDATA ;
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+ }
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+
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+ s -> scr2 = deposit32 (s -> scr2 , 8 , 8 , scr2_2 );
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+ }
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+
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static void next_pc_reset_hold (Object * obj , ResetType type )
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{
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NeXTPC * s = NEXT_PC (obj );
@@ -1087,6 +1102,8 @@ static void next_pc_init(Object *obj)
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sysbus_init_mmio (sbd , & s -> timer_mem );
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s -> rtc_power_irq = qdev_get_gpio_in (DEVICE (obj ), NEXT_PWR_I );
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+ qdev_init_gpio_in_named (DEVICE (obj ), next_pc_rtc_data_in_irq ,
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+ "pc-rtc-data-in" , 1 );
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}
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/*
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