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target/hppa: Convert hppa_cpu_init() to ResetHold handler
hppa_cpu_initfn() is called once when a HPPA CPU instance is initialized, but it sets fields which should be set each time a CPU resets. Rename it as a reset handler, having it matching the ResettablePhases::hold() signature, and register it as ResettableClass handler. Since on reset the CPU registers and TLB entries are expected to be zero, add a memset() call clearing CPUHPPAState up to the &end_reset_fields marker. Signed-off-by: Helge Deller <[email protected]> Co-developed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Message-Id: <[email protected]>
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target/hppa/cpu.c

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -193,13 +193,20 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp)
193193
tcg_cflags_set(cs, CF_PCREL);
194194
}
195195

196-
static void hppa_cpu_initfn(Object *obj)
196+
static void hppa_cpu_reset_hold(Object *obj, ResetType type)
197197
{
198+
HPPACPUClass *scc = HPPA_CPU_GET_CLASS(obj);
198199
CPUState *cs = CPU(obj);
199200
HPPACPU *cpu = HPPA_CPU(obj);
200201
CPUHPPAState *env = &cpu->env;
201202

203+
if (scc->parent_phases.hold) {
204+
scc->parent_phases.hold(obj, type);
205+
}
202206
cs->exception_index = -1;
207+
208+
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
209+
203210
cpu_hppa_loaded_fr0(env);
204211
cpu_hppa_put_psw(env, PSW_W);
205212
}
@@ -242,10 +249,14 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
242249
DeviceClass *dc = DEVICE_CLASS(oc);
243250
CPUClass *cc = CPU_CLASS(oc);
244251
HPPACPUClass *acc = HPPA_CPU_CLASS(oc);
252+
ResettableClass *rc = RESETTABLE_CLASS(oc);
245253

246254
device_class_set_parent_realize(dc, hppa_cpu_realizefn,
247255
&acc->parent_realize);
248256

257+
resettable_class_set_parent_phases(rc, NULL, hppa_cpu_reset_hold, NULL,
258+
&acc->parent_phases);
259+
249260
cc->class_by_name = hppa_cpu_class_by_name;
250261
cc->has_work = hppa_cpu_has_work;
251262
cc->mmu_index = hppa_cpu_mmu_index;
@@ -269,7 +280,6 @@ static const TypeInfo hppa_cpu_type_infos[] = {
269280
.parent = TYPE_CPU,
270281
.instance_size = sizeof(HPPACPU),
271282
.instance_align = __alignof(HPPACPU),
272-
.instance_init = hppa_cpu_initfn,
273283
.abstract = false,
274284
.class_size = sizeof(HPPACPUClass),
275285
.class_init = hppa_cpu_class_init,

target/hppa/cpu.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -263,6 +263,9 @@ typedef struct CPUArchState {
263263
IntervalTreeRoot tlb_root;
264264

265265
HPPATLBEntry tlb[HPPA_TLB_ENTRIES];
266+
267+
/* Fields up to this point are cleared by a CPU reset */
268+
struct {} end_reset_fields;
266269
} CPUHPPAState;
267270

268271
/**
@@ -281,13 +284,15 @@ struct ArchCPU {
281284
/**
282285
* HPPACPUClass:
283286
* @parent_realize: The parent class' realize handler.
287+
* @parent_phases: The parent class' reset phase handlers.
284288
*
285289
* An HPPA CPU model.
286290
*/
287291
struct HPPACPUClass {
288292
CPUClass parent_class;
289293

290294
DeviceRealize parent_realize;
295+
ResettablePhases parent_phases;
291296
};
292297

293298
#include "exec/cpu-all.h"

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