Resolve llvm#114. Or at least, resolve the part of it that Fil-C can be used to resolve.

Author: pizlonator

filc/include/pizlonated_math.h

@@ -64,6 +64,7 @@ long double zmath_nearbyintl(long double value);
 unsigned zmath_getcw(void);
 void zmath_setcw(unsigned cw);
 void zmath_feclearexcept(int excepts);
+int zmath_feenableexcept(int excepts);
 
 #ifdef __cplusplus
 }

filc/tests/feclearexcept/feclearexcept.c

@@ -1,8 +1,13 @@
+#define _GNU_SOURCE
+
 #include <fenv.h>
 
 int main()
 {
     feclearexcept(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW);
+#ifdef __USE_GNU
+    feenableexcept(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW);
+#endif
     return 0;
 }
 

libpas/src/libpas/filc_runtime.c

@@ -13173,6 +13173,18 @@ void filc_native_zmath_feclearexcept(filc_thread* my_thread, int excepts)
     PAS_ASSERT(!feclearexcept(excepts));
 }
 
+int filc_native_zmath_feenableexcept(filc_thread* my_thread, int excepts)
+{
+    PAS_UNUSED_PARAM(my_thread);
+#ifdef __USE_GNU
+    return feenableexcept(excepts);
+#else
+    PAS_UNUSED_PARAM(excepts);
+    filc_internal_panic(NULL, "feenableexcept not implemented.");
+    return 0;
+#endif
+}
+
 #endif /* PAS_ENABLE_FILC */
 
 #endif /* LIBPAS_ENABLED */

libpas/src/libpas/generate_pizlonated_forwarders.rb

@@ -558,6 +558,7 @@ def addOutSig(name, rets, *args)
 addSig "unsigned", "zmath_getcw"
 addSig "void", "zmath_setcw", "unsigned"
 addSig "void", "zmath_feclearexcept", "int"
+addSig "int", "zmath_feenableexcept", "int"
 
 addOutSig "void_ptr_ptr", "void", "filc_ptr", "filc_ptr"
 addOutSig "main", "exception/int", "int", "filc_ptr", "filc_ptr"

projects/user-glibc-2.40/sysdeps/x86_64/fpu/feenablxcpt.c

@@ -17,29 +17,10 @@
    <https://www.gnu.org/licenses/>.  */
 
 #include <fenv.h>
+#include <pizlonated_math.h>
 
 int
 feenableexcept (int excepts)
 {
-  unsigned short int new_exc, old_exc;
-  unsigned int new;
-
-  excepts &= FE_ALL_EXCEPT;
-
-  /* Get the current control word of the x87 FPU.  */
-  __asm__ ("fstcw %0" : "=m" (*&new_exc));
-
-  old_exc = (~new_exc) & FE_ALL_EXCEPT;
-
-  new_exc &= ~excepts;
-  __asm__ ("fldcw %0" : : "m" (*&new_exc));
-
-  /* And now the same for the SSE MXCSR register.  */
-  __asm__ ("stmxcsr %0" : "=m" (*&new));
-
-  /* The SSE exception masks are shifted by 7 bits.  */
-  new &= ~(excepts << 7);
-  __asm__ ("ldmxcsr %0" : : "m" (*&new));
-
-  return old_exc;
+  return zmath_feenableexcept(excepts);
 }