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r1cs: remove unnecessary loop in sign check
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src/r1cs/fqvar_ext.rs

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -85,13 +85,11 @@ impl FqVarExtension for FqVar {
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// bytes[0] & 1 == 0
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let true_var = Boolean::<Fq>::TRUE;
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let false_var = Boolean::<Fq>::FALSE;
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let mut is_nonnegative_var = true_var.clone();
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// Check first 8 bits
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for _ in 0..8 {
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let lhs = bitvars[0].and(&true_var.clone())?;
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let this_loop_var = lhs.is_eq(&false_var)?;
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is_nonnegative_var = is_nonnegative_var.and(&this_loop_var)?;
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}
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// Check least significant bit
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let lhs = bitvars[0].and(&true_var)?;
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let is_nonnegative_var = lhs.is_eq(&false_var)?;
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Ok(is_nonnegative_var)
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}
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